From: Abhinav Kumar <quic_abhinavk@quicinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>
Cc: Stephen Boyd <swboyd@chromium.org>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Bjorn Andersson <andersson@kernel.org>,
<linux-arm-msm@vger.kernel.org>,
<dri-devel@lists.freedesktop.org>,
<freedreno@lists.freedesktop.org>
Subject: Re: [PATCH v5 29/32] drm/msm/dpu: enable SmartDMA for the rest of the platforms
Date: Mon, 13 Mar 2023 22:08:15 -0700 [thread overview]
Message-ID: <ec51367b-db01-9922-baeb-3233f56f056f@quicinc.com> (raw)
In-Reply-To: <20230310005704.1332368-30-dmitry.baryshkov@linaro.org>
On 3/9/2023 4:57 PM, Dmitry Baryshkov wrote:
> Enable SmartDMA features for the rest of the platforms where it is
> supposed to work.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
I am so glad we split this. Without visual validation check we wouldnt
have caught the issues and would have ended up with a blank half screen
on our sc7280 CBs on DP.
For sc7280, I validated the foll cases:
1) Basic Chrome UI comes up
2) Validated some browser use-cases and played some youtube videos
3) Validated multiple plug-in/plug-out cases with DP connected
4) IGT test cases with DP connected:
- kms_atomic
- kms_atomic_transition
- kms_pipe_basic_crc
Some notes:
1) I wanted to test 4k with this too but my monitor only supports 4k@60
which is not possible with 24bpp with 2 lanes and due to the HBR3 black
screen issue I could not test that so far. But since I have that issue
even with 1080P and without these changes, it should have no effect due
to this series.
2) I wanted to test some YUV overlay cases but I still cannot find one
on chrome. Its always using RGB. Will check with others.
With these two noted, this change and this series has my
Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Only for sc7280 device.
I still cannot give my R-b on this change till others validate visually
and ensure things arent broken for them.
If we don't get enough validation and if only sc7280 remains in this
change, please re-post it with only that and I will give my R-b too.
> ---
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 54 ++++++++-----------
> 1 file changed, 23 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 1fc0dfbebb7e..fc818b0273e7 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -21,19 +21,16 @@
> (VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED3))
>
> #define VIG_SDM845_MASK \
> - (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3))
> -
> -#define VIG_SDM845_MASK_SDMA \
> - (VIG_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
> + (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3) |\
> + BIT(DPU_SSPP_SMART_DMA_V2))
>
> #define VIG_SC7180_MASK \
> - (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED4))
> + (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED4) |\
> + BIT(DPU_SSPP_SMART_DMA_V2))
>
> #define VIG_SM8250_MASK \
> - (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3LITE))
> -
> -#define VIG_SM8250_MASK_SDMA \
> - (VIG_SM8250_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
> + (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3LITE) |\
> + BIT(DPU_SSPP_SMART_DMA_V2))
>
> #define VIG_QCM2290_MASK (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL))
>
> @@ -48,17 +45,12 @@
> #define DMA_SDM845_MASK \
> (BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_QOS_8LVL) |\
> BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_TS_PREFILL_REC1) |\
> + BIT(DPU_SSPP_SMART_DMA_V2) |\
> BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT))
>
> #define DMA_CURSOR_SDM845_MASK \
> (DMA_SDM845_MASK | BIT(DPU_SSPP_CURSOR))
>
> -#define DMA_SDM845_MASK_SDMA \
> - (DMA_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
> -
> -#define DMA_CURSOR_SDM845_MASK_SDMA \
> - (DMA_CURSOR_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
> -
> #define DMA_CURSOR_MSM8998_MASK \
> (DMA_MSM8998_MASK | BIT(DPU_SSPP_CURSOR))
>
> @@ -1208,21 +1200,21 @@ static const struct dpu_sspp_cfg msm8998_sspp[] = {
> };
>
> static const struct dpu_sspp_cfg sdm845_sspp[] = {
> - SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SDM845_MASK_SDMA,
> + SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SDM845_MASK,
> sdm845_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0),
> - SSPP_BLK("sspp_1", SSPP_VIG1, 0x6000, VIG_SDM845_MASK_SDMA,
> + SSPP_BLK("sspp_1", SSPP_VIG1, 0x6000, VIG_SDM845_MASK,
> sdm845_vig_sblk_1, 4, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG1),
> - SSPP_BLK("sspp_2", SSPP_VIG2, 0x8000, VIG_SDM845_MASK_SDMA,
> + SSPP_BLK("sspp_2", SSPP_VIG2, 0x8000, VIG_SDM845_MASK,
> sdm845_vig_sblk_2, 8, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG2),
> - SSPP_BLK("sspp_3", SSPP_VIG3, 0xa000, VIG_SDM845_MASK_SDMA,
> + SSPP_BLK("sspp_3", SSPP_VIG3, 0xa000, VIG_SDM845_MASK,
> sdm845_vig_sblk_3, 12, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG3),
> - SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, DMA_SDM845_MASK_SDMA,
> + SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, DMA_SDM845_MASK,
> sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0),
> - SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, DMA_SDM845_MASK_SDMA,
> + SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, DMA_SDM845_MASK,
> sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA1),
> - SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, DMA_CURSOR_SDM845_MASK_SDMA,
> + SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, DMA_CURSOR_SDM845_MASK,
> sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR0),
> - SSPP_BLK("sspp_11", SSPP_DMA3, 0x2a000, DMA_CURSOR_SDM845_MASK_SDMA,
> + SSPP_BLK("sspp_11", SSPP_DMA3, 0x2a000, DMA_CURSOR_SDM845_MASK,
> sdm845_dma_sblk_3, 13, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR1),
> };
>
> @@ -1263,21 +1255,21 @@ static const struct dpu_sspp_sub_blks sm8250_vig_sblk_3 =
> _VIG_SBLK("3", 8, DPU_SSPP_SCALER_QSEED3LITE);
>
> static const struct dpu_sspp_cfg sm8250_sspp[] = {
> - SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SM8250_MASK_SDMA,
> + SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SM8250_MASK,
> sm8250_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0),
> - SSPP_BLK("sspp_1", SSPP_VIG1, 0x6000, VIG_SM8250_MASK_SDMA,
> + SSPP_BLK("sspp_1", SSPP_VIG1, 0x6000, VIG_SM8250_MASK,
> sm8250_vig_sblk_1, 4, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG1),
> - SSPP_BLK("sspp_2", SSPP_VIG2, 0x8000, VIG_SM8250_MASK_SDMA,
> + SSPP_BLK("sspp_2", SSPP_VIG2, 0x8000, VIG_SM8250_MASK,
> sm8250_vig_sblk_2, 8, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG2),
> - SSPP_BLK("sspp_3", SSPP_VIG3, 0xa000, VIG_SM8250_MASK_SDMA,
> + SSPP_BLK("sspp_3", SSPP_VIG3, 0xa000, VIG_SM8250_MASK,
> sm8250_vig_sblk_3, 12, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG3),
> - SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, DMA_SDM845_MASK_SDMA,
> + SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, DMA_SDM845_MASK,
> sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0),
> - SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, DMA_SDM845_MASK_SDMA,
> + SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, DMA_SDM845_MASK,
> sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA1),
> - SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, DMA_CURSOR_SDM845_MASK_SDMA,
> + SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, DMA_CURSOR_SDM845_MASK,
> sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR0),
> - SSPP_BLK("sspp_11", SSPP_DMA3, 0x2a000, DMA_CURSOR_SDM845_MASK_SDMA,
> + SSPP_BLK("sspp_11", SSPP_DMA3, 0x2a000, DMA_CURSOR_SDM845_MASK,
> sdm845_dma_sblk_3, 13, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR1),
> };
>
next prev parent reply other threads:[~2023-03-14 5:08 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-10 0:56 [PATCH v5 00/32] drm/msm/dpu: wide planes support Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 01/32] drm/msm/dpu: rename struct dpu_hw_pipe(_cfg) to dpu_hw_sspp(_cfg) Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 02/32] drm/msm/dpu: move SSPP allocation to the RM Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 03/32] drm/msm/dpu: move SSPP debugfs creation to dpu_kms.c Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 04/32] drm/msm/dpu: drop EAGAIN check from dpu_format_populate_layout Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 05/32] drm/msm/dpu: move pipe_hw to dpu_plane_state Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 06/32] drm/msm/dpu: drop dpu_plane_pipe function Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 07/32] drm/msm/dpu: introduce struct dpu_sw_pipe Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 08/32] drm/msm/dpu: use dpu_sw_pipe for dpu_hw_sspp callbacks Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 09/32] drm/msm/dpu: pass dpu_format to _dpu_hw_sspp_setup_scaler3() Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 10/32] drm/msm/dpu: clean up SRC addresses when setting up SSPP for solid fill Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 11/32] drm/msm/dpu: move stride programming to dpu_hw_sspp_setup_sourceaddress Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 12/32] drm/msm/dpu: remove dpu_hw_fmt_layout from struct dpu_hw_sspp_cfg Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 13/32] drm/msm/dpu: rename dpu_hw_sspp_cfg to dpu_sw_pipe_cfg Dmitry Baryshkov
2023-03-14 3:38 ` Abhinav Kumar
2023-03-10 0:56 ` [PATCH v5 14/32] drm/msm/dpu: drop src_split and multirect check from dpu_crtc_atomic_check Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 15/32] drm/msm/dpu: don't use unsupported blend stages Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 16/32] drm/msm/dpu: move the rest of plane checks to dpu_plane_atomic_check() Dmitry Baryshkov
2023-03-14 4:02 ` Abhinav Kumar
2023-03-14 4:14 ` Dmitry Baryshkov
2023-03-14 4:42 ` Abhinav Kumar
2023-03-10 0:56 ` [PATCH v5 17/32] drm/msm/dpu: drop redundant plane dst check from dpu_crtc_atomic_check() Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 18/32] drm/msm/dpu: rewrite plane's QoS-related functions to take dpu_sw_pipe and dpu_format Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 19/32] drm/msm/dpu: make _dpu_plane_calc_clk accept mode directly Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 20/32] drm/msm/dpu: add dpu_hw_sspp_cfg to dpu_plane_state Dmitry Baryshkov
2023-03-14 4:11 ` Abhinav Kumar
2023-03-10 0:56 ` [PATCH v5 21/32] drm/msm/dpu: simplify dpu_plane_validate_src() Dmitry Baryshkov
2023-03-14 4:16 ` Abhinav Kumar
2023-03-10 0:56 ` [PATCH v5 22/32] drm/msm/dpu: rework dpu_plane_sspp_atomic_update() Dmitry Baryshkov
2023-03-14 4:21 ` Abhinav Kumar
2023-03-10 0:56 ` [PATCH v5 23/32] drm/msm/dpu: rework dpu_plane_atomic_check() Dmitry Baryshkov
2023-03-14 4:24 ` Abhinav Kumar
2023-03-10 0:56 ` [PATCH v5 24/32] drm/msm/dpu: rework plane CSC setting Dmitry Baryshkov
2023-03-10 0:56 ` [PATCH v5 25/32] drm/msm/dpu: rework static color fill code Dmitry Baryshkov
2023-03-14 4:28 ` Abhinav Kumar
2023-03-10 0:56 ` [PATCH v5 26/32] drm/msm/dpu: split pipe handling from _dpu_crtc_blend_setup_mixer Dmitry Baryshkov
2023-03-14 4:30 ` Abhinav Kumar
2023-03-10 0:56 ` [PATCH v5 27/32] drm/msm/dpu: add support for wide planes Dmitry Baryshkov
2023-03-14 4:40 ` Abhinav Kumar
2023-03-10 0:57 ` [PATCH v5 28/32] drm/msm/dpu: populate SmartDMA features in hw catalog Dmitry Baryshkov
2023-03-14 4:49 ` Abhinav Kumar
2023-03-10 0:57 ` [PATCH v5 29/32] drm/msm/dpu: enable SmartDMA for the rest of the platforms Dmitry Baryshkov
2023-03-14 5:08 ` Abhinav Kumar [this message]
2023-03-14 10:58 ` Dmitry Baryshkov
2023-03-14 16:35 ` Abhinav Kumar
2023-03-14 16:43 ` Dmitry Baryshkov
2023-03-14 16:47 ` Abhinav Kumar
2023-03-14 17:23 ` Dmitry Baryshkov
2023-03-10 0:57 ` [PATCH v5 30/32] drm/msm/dpu: drop smart_dma_rev from dpu_caps Dmitry Baryshkov
2023-03-14 5:12 ` Abhinav Kumar
2023-03-10 0:57 ` [PATCH v5 31/32] drm/msm/dpu: log the multirect_index in _dpu_crtc_blend_setup_pipe Dmitry Baryshkov
2023-03-14 4:44 ` Abhinav Kumar
2023-03-10 0:57 ` [PATCH v5 32/32] drm/msm/dpu: remove unused dpu_plane_validate_multirect_v2 function Dmitry Baryshkov
2023-03-14 4:44 ` Abhinav Kumar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ec51367b-db01-9922-baeb-3233f56f056f@quicinc.com \
--to=quic_abhinavk@quicinc.com \
--cc=airlied@gmail.com \
--cc=andersson@kernel.org \
--cc=daniel@ffwll.ch \
--cc=dmitry.baryshkov@linaro.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=freedreno@lists.freedesktop.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=robdclark@gmail.com \
--cc=sean@poorly.run \
--cc=swboyd@chromium.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox