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Mon, 16 Dec 2024 22:46:12 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4BGMkBTj001585 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 16 Dec 2024 22:46:11 GMT Received: from [10.110.119.169] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 16 Dec 2024 14:46:10 -0800 Message-ID: Date: Mon, 16 Dec 2024 14:46:09 -0800 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/8] drm/msm/dpu: link DSPP_2/_3 blocks on SM8150 To: Dmitry Baryshkov CC: Rob Clark , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Robert Foss , Neil Armstrong , Abel Vesa , Richard Acayan , Rob Clark , , , , References: <20241216-dpu-fix-catalog-v1-0-15bf0807dba1@linaro.org> <20241216-dpu-fix-catalog-v1-1-15bf0807dba1@linaro.org> Content-Language: en-US From: Abhinav Kumar In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: mrUyvHh6U7jX1oCMrakJ1MxamOyn5_Ev X-Proofpoint-ORIG-GUID: mrUyvHh6U7jX1oCMrakJ1MxamOyn5_Ev X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 suspectscore=0 priorityscore=1501 mlxscore=0 spamscore=0 malwarescore=0 clxscore=1015 phishscore=0 adultscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412160187 On 12/16/2024 2:21 PM, Dmitry Baryshkov wrote: > On Mon, Dec 16, 2024 at 01:11:35PM -0800, Abhinav Kumar wrote: >> >> >> On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote: >>> Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks. >>> >>> Fixes: 05ae91d960fd ("drm/msm/dpu: enable DSPP support on SM8[12]50") >>> Signed-off-by: Dmitry Baryshkov >>> --- >>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 2 ++ >>> 1 file changed, 2 insertions(+) >>> >> >> Change looks fine >> >> Reviewed-by: Abhinav Kumar >> >> One question below (not tied to the change but arose due to it): >> >>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h >>> index 6ccfde82fecdb4e3612df161814b16f7af40ca5f..421afacb7248039abd9fb66bcb73b756ae0d640a 100644 >>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h >>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h >>> @@ -164,6 +164,7 @@ static const struct dpu_lm_cfg sm8150_lm[] = { >>> .sblk = &sdm845_lm_sblk, >>> .lm_pair = LM_3, >>> .pingpong = PINGPONG_2, >>> + .dspp = DSPP_2, >>> }, { >>> .name = "lm_3", .id = LM_3, >>> .base = 0x47000, .len = 0x320, >>> @@ -171,6 +172,7 @@ static const struct dpu_lm_cfg sm8150_lm[] = { >>> .sblk = &sdm845_lm_sblk, >>> .lm_pair = LM_2, >>> .pingpong = PINGPONG_3, >>> + .dspp = DSPP_3, >>> }, { >>> .name = "lm_4", .id = LM_4, >>> .base = 0x48000, .len = 0x320, >>> >> >> the consumer of .dspp seems to be in the RM code which is used to map the >> DSPP to encoder_id but is there really any case where lm_id != dspp_id ... I >> guess I am missing the context of why DSPP id needs to be tracked as LMs and >> DSPPs go together. Let me also check this part internally. > > For example check the SDM845, the LM_5 is tied to DSPP_3. > > LM | DSPP > --------- > 0 | 0 > 1 | 1 > 2 | 2 > 5 | 3 > Ah ... yes ... seems like sdm845 is the only one having this anomaly. Thanks for clarifying.