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Wed, 17 Jan 2024 15:10:14 GMT Received: from [10.253.79.191] (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 17 Jan 2024 07:10:10 -0800 Message-ID: Date: Wed, 17 Jan 2024 23:10:07 +0800 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/6] arm64: dts: qcom: ipq5332: Add MDIO device tree To: Andrew Lunn CC: , , , , , , , , , , , , , , , References: <20240110112059.2498-1-quic_luoj@quicinc.com> <20240110112059.2498-4-quic_luoj@quicinc.com> <4bc0aff5-8a1c-44a6-89d8-460961a61310@lunn.ch> <61973012-3f74-4b58-9575-3bc5199f61d9@lunn.ch> <5c88945b-4a80-4346-a77c-82a68ae02047@quicinc.com> <6975e79a-67eb-46d7-8445-92610b8b5198@lunn.ch> Content-Language: en-US From: Jie Luo In-Reply-To: <6975e79a-67eb-46d7-8445-92610b8b5198@lunn.ch> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: EthOji6xAPZbL2nJE2QuW4h2Y10JP8N0 X-Proofpoint-GUID: EthOji6xAPZbL2nJE2QuW4h2Y10JP8N0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_08,2024-01-17_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 mlxlogscore=369 mlxscore=0 impostorscore=0 phishscore=0 adultscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2401170110 On 1/17/2024 6:56 AM, Andrew Lunn wrote: >> Another one is the MDIO slave(gpio25, 26), which is dedicated >> for receiving the back pressure signal from the connected Ethernet switch >> device QCA8386. >> >> There is a MDIO master block integrated in QCA8386 switch device, this >> integrated MDIO master is dedicated for generating the back >> pressure signal to IPQ5332 SoC. >> >> This MDIO slave block of IPQ5322 just needs to configure these PIN >> mux for MDC and MDIO PINs. No additional driver is needed for this MDIO >> slave block of IPQ5332. > > So there is a proprietary protocol running over the MDIO bus? And its > completely implemented in hardware in the slave block? Is this even > MDIO? Does it use c22 or c45 bus transactions? How is the slave > address configured, or is that also hard coded? > > Andrew > Hi Andrew, Yes, this is a custom HW mechanism using the MDIO C22 frame, to enable back pressure from the QCA8386 switch to the IPQ5332 SoC. The slave block in the IPQ5332 SoC implements the back pressure function. There is no configuration for the MDIO slave address of IPQ5332 required, since the connection is one to one between slave and master. However upon further review, we believe this node definition belongs to the board DTS file, since the switch configuration is a board property. We will move out this MDIO slave config from the patch series to avoid the confusion. We will also rename the node from 'mdio0-state' to 'backpressure-state' to make this clear. Thanks.