Re: Questions About SM8550 Support

[Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>]

On 2/3/2026 4:31 AM, Aaron Kling wrote:
> On Mon, Feb 2, 2026 at 3:35 AM Taniya Das <taniya.das@oss.qualcomm.com> wrote:
>>
>>
>>
>> On 1/28/2026 7:33 PM, Konrad Dybcio wrote:
>>> On 1/27/26 11:48 PM, Aaron Kling wrote:
>>>> I am working on the AYN Odin 2 qcs8550 series of devices, specifically
>>>> for Android, using mainline kernel drivers. I have come across some
>>>> missing functionality and failures that I would like to inquire about.
>>>
>>> [...]
>>>
>>>> * Some gpu related clocks complain about being stuck off during boot,
>>>> causing stack traces, but the gpu does work. I tried to do some
>>>> research into this, but quickly got lost in the weeds and I have no
>>>> idea where to even look.
>>>> [    0.367278] gpu_cc_cxo_clk status stuck at 'off'
>>>> [    0.367962] gpu_cc_hub_cx_int_clk status stuck at 'off'
>>>> [    0.368595] gpu_cc_cx_gmu_clk status stuck at 'off'
>>>> [    0.369245] disp_cc_mdss_ahb1_clk status stuck at 'off'
>>>
>>
>> Aaron, if you could share the boot up logs or stack traces it would be
>> helpful to see what is leading to stuck at 'off'.
> 
> Sure. Here [0] is a kernel boot log booting to Android launcher.
> 
> Aaron
> 
> [0]  http://0x0.st/PbLh.txt

Thanks Aaron for sharing the logs!

This warnings seems to be due to below ACK change which tries to proxy vote on
the boot time enabled clocks. And the same change is not part of Linux mainline.

https://android-review.googlesource.com/c/kernel/common/+/1164507

Can you please see if dropping above change is helping to avoid the warnings? or
please apply below patch and see if helps to avoid the warnings.

diff --git a/drivers/clk/qcom/dispcc-sm8550.c b/drivers/clk/qcom/dispcc-sm8550.c
index f27140c649f5..55dee8a96e74 100644
--- a/drivers/clk/qcom/dispcc-sm8550.c
+++ b/drivers/clk/qcom/dispcc-sm8550.c
@@ -825,7 +825,7 @@ static struct clk_branch disp_cc_mdss_ahb1_clk = {
                                &disp_cc_mdss_ahb_clk_src.clkr.hw,
                        },
                        .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
+                       .flags = CLK_SET_RATE_PARENT | CLK_DONT_HOLD_STATE,
                        .ops = &clk_branch2_ops,
                },
        },
diff --git a/drivers/clk/qcom/gpucc-sm8550.c b/drivers/clk/qcom/gpucc-sm8550.c
index 7486edf56160..2cd27cb835f9 100644
--- a/drivers/clk/qcom/gpucc-sm8550.c
+++ b/drivers/clk/qcom/gpucc-sm8550.c
@@ -330,7 +330,7 @@ static struct clk_branch gpu_cc_cx_gmu_clk = {
                                &gpu_cc_gmu_clk_src.clkr.hw,
                        },
                        .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
+                       .flags = CLK_SET_RATE_PARENT | CLK_DONT_HOLD_STATE,
                        .ops = &clk_branch2_aon_ops,
                },
        },
@@ -348,7 +348,7 @@ static struct clk_branch gpu_cc_cxo_clk = {
                                &gpu_cc_xo_clk_src.clkr.hw,
                        },
                        .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
+                       .flags = CLK_SET_RATE_PARENT | CLK_DONT_HOLD_STATE,
                        .ops = &clk_branch2_ops,
                },
        },
@@ -415,7 +415,7 @@ static struct clk_branch gpu_cc_hub_cx_int_clk = {
                                &gpu_cc_hub_clk_src.clkr.hw,
                        },
                        .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
+                       .flags = CLK_SET_RATE_PARENT | CLK_DONT_HOLD_STATE,
                        .ops = &clk_branch2_aon_ops,
                },
        },

Thanks,
Jagadeesh