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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6222f293a31sm5874197a12.12.2025.09.08.01.43.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 Sep 2025 01:43:53 -0700 (PDT) Message-ID: Date: Mon, 8 Sep 2025 10:43:50 +0200 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/5] i2c: qcom-cci: Add OPP table support and enforce FAST_PLUS requirements To: Stephan Gerhold , Konrad Dybcio Cc: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bryan O'Donoghue , Loic Poulain , Robert Foss , Andi Shyti , Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org References: <20250904-topic-cci_updates-v1-0-d38559692703@oss.qualcomm.com> <20250904-topic-cci_updates-v1-4-d38559692703@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=H7Dbw/Yi c=1 sm=1 tr=0 ts=68be974d cx=c_pps a=UgVkIMxJMSkC9lv97toC5g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=eeKOm84Awb0PVD3MLwsA:9 a=QEXdDO2ut3YA:10 a=1HOtulTD9v-eNWfpl4qZ:22 X-Proofpoint-GUID: Ewem4KMH_-h0z-WX6dxmw3VJdIf4jEVG X-Proofpoint-ORIG-GUID: Ewem4KMH_-h0z-WX6dxmw3VJdIf4jEVG X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTA2MDAzOSBTYWx0ZWRfX8RASAyYsvokh 6D8aWBO9eejVOkBz+DMpjk02viYY/EylvRj5cciXHFI4w5bhnR1D8JiklzgGqYztxhkNtiJdp7J JD2dePVZA9QkpXaafttAoxfVm4i9LhtcN00aN5m7dM6WulzYnKSBMg6XlU76Mk5jHBymmZLWBOK 9oVhWB+NG4PEfoNdIA8SXimfZSkfPbfJy41I0XFcegKALUXSspWRXqw4LrPRv/UFiOsLDx14sud 1kum2gXSwJjYDu64SojTLEwXC48V+4/HBH9Xscv6suaqU4nCuvnAB3EqW9e8ZBnQJraARNM/VRp ML59MV/shPBDKqJd/bU0qHeS3I5sWKtZjGGAo7aagD0jWlH76fnQZZhJIKBfHdovckLOYl08aLJ kiMQprnU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-08_03,2025-09-08_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 impostorscore=0 adultscore=0 phishscore=0 clxscore=1015 suspectscore=0 priorityscore=1501 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509060039 On 9/8/25 10:36 AM, Stephan Gerhold wrote: > On Thu, Sep 04, 2025 at 04:31:23PM +0200, Konrad Dybcio wrote: >> From: Konrad Dybcio >> >> The CCI clock has voltage requirements, which need to be described >> through an OPP table. >> >> The 1 MHz FAST_PLUS mode requires the CCI core clock runs at 37,5 MHz >> (which is a value common across all SoCs), since it's not possible to >> reach the required timings with the default 19.2 MHz rate. >> >> Address both issues by introducing an OPP table and using it to vote >> for the faster rate. >> >> Signed-off-by: Konrad Dybcio > > Using an OPP table for a single static rate that remains the same over > the whole lifetime of the driver feels like overkill to me. Couldn't you > just put the "required-opps" directly into the device node so that it is > automatically applied when the device goes in/out of runtime suspend? > > And since you need to make DT additions anyway, couldn't you just use > "assigned-clock-rates" to avoid the need for a driver patch entirely? We > use that for e.g. USB clocks as well. This is futureproofing, in case someone invents FastMode++ with a higher dvfs requirement or for when the driver adds presets for a 19.2 MHz CCI clock which would (marginally) decrease power consumption Konrad