Linux ARM-MSM sub-architecture
 help / color / mirror / Atom feed
From: Jie Luo <quic_luoj@quicinc.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Conor Dooley <conor@kernel.org>
Cc: <agross@kernel.org>, <andersson@kernel.org>,
	<konrad.dybcio@linaro.org>, <davem@davemloft.net>,
	<edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<conor+dt@kernel.org>, <andrew@lunn.ch>, <hkallweit1@gmail.com>,
	<linux@armlinux.org.uk>, <robert.marko@sartura.hr>,
	<linux-arm-msm@vger.kernel.org>, <netdev@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<quic_srichara@quicinc.com>
Subject: Re: [PATCH v2 5/5] dt-bindings: net: ipq4019-mdio: Document ipq5332 platform
Date: Fri, 15 Dec 2023 20:40:20 +0800	[thread overview]
Message-ID: <f656d1c7-ea86-405a-9165-9eb079ea6f2a@quicinc.com> (raw)
In-Reply-To: <602759ce-c93d-4111-9272-1dce7e4a170a@linaro.org>



On 12/15/2023 8:19 PM, Krzysztof Kozlowski wrote:
> On 15/12/2023 12:42, Jie Luo wrote:
>>>>>>>>> Which clocks are these mentioned in the property? From where do they come?
>>>>>>>>>
>>>>>>>>> Anyway, property is in existing form is not correct - this is not a
>>>>>>>>> generic property.
>>>>>>>>>
>>>>>>>>
>>>>>>>> This property cmn-reference-clock is just the hardware register
>>>>>>>> configuration, since the different IPQ platform needs to select
>>>>>>>> the different reference clock source for the CMN PLL block that
>>>>>>>> provides the various clock outputs to the all kinds of Ethernet
>>>>>>>> devices, which is not from GCC provider.
>>>>>>>
>>>>>>> AGAIN: where do the clocks come from? Which device generates them?
>>>>>>
>>>>>> Oh, OK, the reference clock is from wifi that provides 48MHZ to
>>>>>> Ethernet block.
>>>>>
>>>>> Then WiFi should be providing you the clock and this device should be
>>>>> clock consumer, right?
>>>>
>>>> Yes, wifi provides 48MHz clock to CMM PLL block, there is no GCC
>>>> for this 48MHZ clock output, it is the hardware PIN connection.
>>>
>>> All clocks are some hardware pin connections.
>>>
>>> Best regards,
>>> Krzysztof
>>>
>>
>> Yes, all reference clocks here are from hardware pin connection.
> 
> You keep answering with short sentences without touching the root of the
> problem. I don't know exactly why, but I feel this discussion leads
> nowhere. After long discussion you finally admitted that clocks came
> from another device - Wifi. It took us like 6 emails?
> 
> So last statement: if you have clock provider and clock consumer, you
> must represent it in the bindings or provide rationale why it should not
> or must not be represented in the bindings. So far I do not see any of
> such arguments.
> 
> If you use arguments like:
> "My driver....": sorry, bindings are not about drivers
> "I don't have clock driver for WiFi": sorry, it does not matter if you
> can write one, right?
> 
> Please reach internally your colleagues to solve these problems and make
> review process smoother.
> 
> Best regards,
> Krzysztof
> 
> 

These reference clocks source do not need the hardware configuration,
that is the reason why the clock provider is not needed, some reference
clock source are even from external crystal.

There is also no enable control for the reference clocks since it is
inputted by the hardware PIN connection, i will update these description
in the DT to make it more clear.

  reply	other threads:[~2023-12-15 12:40 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-12 11:51 [PATCH v2 0/5] support ipq5332 platform Luo Jie
2023-12-12 11:51 ` [PATCH v2 1/5] net: mdio: ipq4019: move eth_ldo_rdy before MDIO bus register Luo Jie
2023-12-12 12:50   ` Maxime Chevallier
2023-12-12 19:11     ` Russell King (Oracle)
2023-12-13 10:07       ` Maxime Chevallier
2023-12-12 11:51 ` [PATCH v2 2/5] net: mdio: ipq4019: enable the SoC uniphy clocks for ipq5332 platform Luo Jie
2023-12-12 12:46   ` Maxime Chevallier
2023-12-13  8:05     ` Jie Luo
2023-12-12 11:51 ` [PATCH v2 3/5] net: mdio: ipq4019: configure CMN PLL clock for ipq5332 Luo Jie
2023-12-12 12:54   ` Maxime Chevallier
2023-12-12 19:12     ` Russell King (Oracle)
2023-12-13  8:09     ` Jie Luo
2023-12-13 10:08       ` Maxime Chevallier
2023-12-12 11:51 ` [PATCH v2 4/5] net: mdio: ipq4019: support MDIO clock frequency divider Luo Jie
2023-12-12 11:51 ` [PATCH v2 5/5] dt-bindings: net: ipq4019-mdio: Document ipq5332 platform Luo Jie
2023-12-12 13:24   ` Rob Herring
2023-12-12 16:06   ` Conor Dooley
2023-12-13  8:26     ` Jie Luo
2023-12-14 17:12       ` Conor Dooley
2023-12-15  6:46         ` Jie Luo
2023-12-15  7:29           ` Krzysztof Kozlowski
2023-12-15  9:49             ` Jie Luo
2023-12-15 10:19               ` Krzysztof Kozlowski
2023-12-15 10:33                 ` Jie Luo
2023-12-15 10:37                   ` Krzysztof Kozlowski
2023-12-15 10:40                     ` Jie Luo
2023-12-15 10:53                       ` Krzysztof Kozlowski
2023-12-15 11:42                         ` Jie Luo
2023-12-15 12:19                           ` Krzysztof Kozlowski
2023-12-15 12:40                             ` Jie Luo [this message]
2023-12-15 13:39                               ` Andrew Lunn
2023-12-16 13:31                                 ` Jie Luo
2023-12-15 13:41                               ` Conor Dooley
2023-12-16 13:16                                 ` Jie Luo
2023-12-16 14:16                                   ` Conor Dooley
2023-12-16 15:37                                     ` Jie Luo
2023-12-19 15:47                                       ` Conor Dooley
2023-12-20 10:07                                         ` Jie Luo
2023-12-20  7:28                                       ` Krzysztof Kozlowski
2023-12-20 10:11                                         ` Jie Luo
2023-12-15 10:42                   ` Conor Dooley
2023-12-15 11:42                     ` Jie Luo
2023-12-12 20:06   ` Rob Herring
2023-12-13  8:42     ` Jie Luo

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=f656d1c7-ea86-405a-9165-9eb079ea6f2a@quicinc.com \
    --to=quic_luoj@quicinc.com \
    --cc=agross@kernel.org \
    --cc=andersson@kernel.org \
    --cc=andrew@lunn.ch \
    --cc=conor+dt@kernel.org \
    --cc=conor@kernel.org \
    --cc=davem@davemloft.net \
    --cc=devicetree@vger.kernel.org \
    --cc=edumazet@google.com \
    --cc=hkallweit1@gmail.com \
    --cc=konrad.dybcio@linaro.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=krzysztof.kozlowski@linaro.org \
    --cc=kuba@kernel.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux@armlinux.org.uk \
    --cc=netdev@vger.kernel.org \
    --cc=pabeni@redhat.com \
    --cc=quic_srichara@quicinc.com \
    --cc=robert.marko@sartura.hr \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox