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Fri, 27 Jun 2025 06:48:16 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 55R6mFVe014123 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 27 Jun 2025 06:48:15 GMT Received: from [10.216.48.74] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Thu, 26 Jun 2025 23:48:09 -0700 Message-ID: Date: Fri, 27 Jun 2025 12:18:03 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH V3 1/4] dt-bindings: mmc: Add dll-hsr-list for HS400 and HS200 modes Content-Language: en-US To: Krzysztof Kozlowski , Sachin Gupta , Ulf Hansson , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Adrian Hunter , Bhupesh Sharma CC: , , , , , , , , , , References: <20250122094707.24859-1-quic_sachgupt@quicinc.com> <20250122094707.24859-2-quic_sachgupt@quicinc.com> <72b02fd1-5195-4bb0-b01d-5481b49a5680@kernel.org> <379e9199-4a9e-cd38-20cb-0fbd76fa33b3@quicinc.com> From: Ram Prakash Gupta In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 069sUsop3btBy8DGgJZzhcy9wXDqBk3B X-Proofpoint-ORIG-GUID: 069sUsop3btBy8DGgJZzhcy9wXDqBk3B X-Authority-Analysis: v=2.4 cv=MtZS63ae c=1 sm=1 tr=0 ts=685e3eb0 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=6IFa9wvqVegA:10 a=COk6AnOGAAAA:8 a=RBDf3ioivJUjA6cGglgA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjI3MDA1MiBTYWx0ZWRfX9lpa1pXDb9Bk dGjVD21mfbTT00m4gM9C1BqSOGS9HYpf2PhoOJ4V0VPCdu+Cz+w/Tk3BfX/jgDNrVoWwxLKhYZU 8TXJ6F/pkc6wrlyrzoobQaBHpmX1KmuMywMktm4Wq7pcR5GT51RTDPy61WlGW1b9atsPPlM1EMM 6BN7aHTdmr+1mOCuzShUEkoVLwRgN8I0hdraE99bCktOjDz2rvqqrkMDjzSwlWxA+R0xUiLg4DK qMRLpBjf2goaREdR2Th2+R1tV//cNFLBbQRdS1Pis86TCriOzxe6j3JUANoeTGMocUhOlD4sNyG AIvmOzH+pkKu2s0L/QtRvK6IFtXrVzq+ferizxlThhBGTO3HWG/QHYoNNtGUICDI9UAx5SzpDu6 Hnb8en4Pg75ZhFW3vP9vYHmxRIue1TZDU9XX1+o/Vr3Gu8Spn8E4B17Yw/x0jgKhDVAm8lJV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-06-27_02,2025-06-26_05,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 suspectscore=0 adultscore=0 phishscore=0 mlxlogscore=999 spamscore=0 malwarescore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 mlxscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2506270052 On 6/26/2025 11:12 PM, Krzysztof Kozlowski wrote: > On 26/06/2025 16:16, Ram Prakash Gupta wrote: >> On 1/22/2025 3:56 PM, Krzysztof Kozlowski wrote: >>> On 22/01/2025 10:47, Sachin Gupta wrote: >>>> Document the 'dll-hsr-list' property for MMC device tree bindings. >>>> The 'dll-hsr-list' property defines the DLL configurations for HS400 >>>> and HS200 modes. >>>> >>>> Signed-off-by: Sachin Gupta >>>> --- >>>> Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 5 +++++ >>>> 1 file changed, 5 insertions(+) >>>> >>>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml >>>> index 8b393e26e025..65dc3053df75 100644 >>>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml >>>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml >>>> @@ -133,6 +133,11 @@ properties: >>>> $ref: /schemas/types.yaml#/definitions/uint32 >>>> description: platform specific settings for DLL_CONFIG reg. >>>> >>>> + qcom,dll-hsr-list: >>>> + maxItems: 10 >>>> + $ref: /schemas/types.yaml#/definitions/uint32 >>> uint32 has only one item. Anyway, there is already DLL there, so don't >>> duplicate or explain why this is different. Explain also why this is not >>> deducible from the compatible. > > Timeline still amazes me. I will be grumpy on this thread. > >> I will change it to reflect array from uint32. >> There is change with artanis DLL hw addition where it need total of 5 entries >> (dll_config, dll_config_2, dll_config_3, dll_usr_ctl, ddr_config) >> for each HS400 and HS200 modes, hence the new addition in dt. And these values >> are not fixed and varies for every SoC, hence this needs to be passed through >> dt like it was passed earlier for qcom,dll-config & qcom,ddr-config. > > Eh, no. That's not a valid reason. It's still SoC deducible. Don't bring > your downstream practices here, but remove EVERYTHING from downstream > and start doing things like upstream is doing. > > Best regards, > Krzysztof Sorry I did not get it - you mean to say keep these values in driver file? how is it possible to tie these value with only one compatible which can vary with every soc or you are suggesting me to make code change in driver for every target having artanis dll hw. And sorry but considering upstream only this design was put in place, its not about downstream, since there are already dll_config and ddr_config which are passed through dt, its logical here to pass rest of the dll related parameters through dt only. Thanks, Ram