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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ad1894c0363sm50718166b.121.2025.05.02.06.41.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 02 May 2025 06:41:22 -0700 (PDT) Message-ID: Date: Fri, 2 May 2025 15:41:19 +0200 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] phy: qcom: qmp-pcie: Update PHY settings for SA8775P To: Mrinmay Sarkar , Dmitry Baryshkov Cc: Vinod Koul , Kishon Vijay Abraham I , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, krishna.chundru@oss.qualcomm.com, quic_vbadigan@quicinc.com, quic_nayiluri@quicinc.com, quic_ramkri@quicinc.com, quic_nitegupt@quicinc.com References: <20250423-update_phy-v1-0-30eb51703bb8@oss.qualcomm.com> <20250423-update_phy-v1-1-30eb51703bb8@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: CFTOgDC7T8rj9QR38y1X9BC_NrVldg4u X-Authority-Analysis: v=2.4 cv=KtlN2XWN c=1 sm=1 tr=0 ts=6814cb84 cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=EUspDBNiAAAA:8 a=2aamsdQwrFB3mmDgIHkA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 X-Proofpoint-ORIG-GUID: CFTOgDC7T8rj9QR38y1X9BC_NrVldg4u X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTAyMDEwOCBTYWx0ZWRfX72EoSRgzKOSu 6+xO9EznUs+NaCInkBcOO2iLHe8emZWPx98GphishL5yjKAAipdLY4eDjlsgOXfO+WcsuYdhnGi VY3rEDuDE1N7qdUTGn1g6bz5oxREqQZPzH/4MZJwQVNUx3K3I9GxQQESXOvWqvhEii/msUEuRAF pk/hXDHWY4DeldB8i3YmWhHXSwoMbLAIUaQfxDPio/zwm9axZiSNQJEjTFmlyo255RxHzFH8tSd FMBftlhgrXK0DdnWAxRNd+oSZeSZY65GuBXKlEIxpj7G4YArQSgTwfjXqrhm3YTw2xAcWYIJ5Bf rvZYj/Y1k5Wzb9o7t1vetRdoFX7OyY1mA1rvOazoWuk3mkrAP237Ol0EV4TlOD9PJOQTxTpOLrv EsNYc878asTaSwQoUSFP2/369RGJ38Ec9UIZdyYzcOb33aPy/ZvYVxFHaQ/5Qq11kKs+VgQA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-02_01,2025-04-30_01,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 priorityscore=1501 malwarescore=0 mlxscore=0 bulkscore=0 mlxlogscore=999 spamscore=0 impostorscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2505020108 On 5/2/25 2:25 PM, Mrinmay Sarkar wrote: > On Wed, Apr 23, 2025 at 7:07 PM Dmitry Baryshkov < > dmitry.baryshkov@oss.qualcomm.com> wrote: > >> On Wed, Apr 23, 2025 at 04:45:43PM +0530, Mrinmay Sarkar wrote: >>> This change updates the PHY settings to align with the latest >>> PCIe PHY Hardware Programming Guide for both PCIe controllers >>> on the SA8775P platform. >> >> Please read Documentation/process/submitting-patches.rst, look for >> '[This patch] makes xyzzy'. >> >>> >>> Signed-off-by: Mrinmay Sarkar >>> --- >>> drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 89 >> ++++++++++++---------- >>> drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h | 2 + >>> drivers/phy/qualcomm/phy-qcom-qmp-pcs-v5_20.h | 4 + >>> .../phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v5.h | 11 +++ >>> drivers/phy/qualcomm/phy-qcom-qmp.h | 1 + >>> 5 files changed, 66 insertions(+), 41 deletions(-) >>> >>> @@ -3191,6 +3194,7 @@ static const struct qmp_pcie_offsets >> qmp_pcie_offsets_v5_20 = { >>> .rx = 0x0200, >>> .tx2 = 0x0800, >>> .rx2 = 0x0a00, >>> + .ln_shrd = 0x0e00, >>> }; >> >> This does more than just updating PHY sequences. ln_shrd-related changes >> should go into a separate commit. >> >> Hi Dmitry, > thanks for the review. > Actually in the previous phy version there was no ln_shrd related > register write. > and only one ln_shrd related register write introduced to the latest > phy version. > so introduce added ln_shrd with phy update. > > I will add a separate change for ln_shrd. I think it's fine to change them both in a single commit, but you should explain in the commit message that previously no writes have been made to that region simply because none were deemed necessary. Splitting that into two commits will give us an unpredictable programming of the PHY, where not all parameters are in sync. Unless that separate commit would be just adding the offset data, but I think that's form over function really Konrad