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From: Stephen Boyd <sboyd@kernel.org>
To: Devi Priya <quic_devipriy@quicinc.com>,
	agross@kernel.org, andersson@kernel.org,
	konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	mturquette@baylibre.com
Cc: quic_srichara@quicinc.com, quic_sjaganat@quicinc.com,
	quic_kathirav@quicinc.com, quic_anusha@quicinc.com,
	quic_saahtoma@quicinc.com
Subject: Re: [PATCH] clk: qcom: clk-alpha-pll: Use determine_rate instead of round_rate
Date: Wed, 19 Jul 2023 13:04:48 -0700	[thread overview]
Message-ID: <f726290fe0678217f2e17b6a68c20d42.sboyd@kernel.org> (raw)
In-Reply-To: <20230710093206.18894-1-quic_devipriy@quicinc.com>

Quoting Devi Priya (2023-07-10 02:32:06)
> @@ -1094,25 +1099,25 @@ static const struct clk_div_table clk_alpha_2bit_div_table[] = {
>         { }
>  };
>  
> -static long
> -clk_alpha_pll_postdiv_round_rate(struct clk_hw *hw, unsigned long rate,
> -                                unsigned long *prate)
> +static int clk_alpha_pll_postdiv_determine_rate(struct clk_hw *hw,
> +                                               struct clk_rate_request *req)
>  {
>         struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw);
>         const struct clk_div_table *table;
> +       unsigned long rate = req->rate;
>  
>         if (pll->width == 2)
>                 table = clk_alpha_2bit_div_table;
>         else
>                 table = clk_alpha_div_table;
>  
> -       return divider_round_rate(hw, rate, prate, table,
> -                                 pll->width, CLK_DIVIDER_POWER_OF_TWO);
> +       req->rate = divider_round_rate(hw, rate, &req->best_parent_rate, table,

Can you use divider_determine_rate() instead?

> +                                      pll->width, CLK_DIVIDER_POWER_OF_TWO);
> +       return 0;
>  }
>  
> -static long
> -clk_alpha_pll_postdiv_round_ro_rate(struct clk_hw *hw, unsigned long rate,
> -                                   unsigned long *prate)
> +static int clk_alpha_pll_postdiv_determine_ro_rate(struct clk_hw *hw,
> +                                                  struct clk_rate_request *req)
>  {
>         struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw);
>         u32 ctl, div;
[...]
> @@ -1452,14 +1459,16 @@ clk_trion_pll_postdiv_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
>         return (parent_rate / div);
>  }
>  
> -static long
> -clk_trion_pll_postdiv_round_rate(struct clk_hw *hw, unsigned long rate,
> -                                unsigned long *prate)
> +static int
> +clk_trion_pll_postdiv_determine_rate(struct clk_hw *hw,
> +                                    struct clk_rate_request *req)
>  {
>         struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw);
>  
> -       return divider_round_rate(hw, rate, prate, pll->post_div_table,
> -                                 pll->width, CLK_DIVIDER_ROUND_CLOSEST);
> +       req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate,

divider_determine_rate()?

> +                                      pll->post_div_table, pll->width,
> +                                      CLK_DIVIDER_ROUND_CLOSEST);
> +       return 0;
>  };
>  
>  static int
> @@ -1485,18 +1494,21 @@ clk_trion_pll_postdiv_set_rate(struct clk_hw *hw, unsigned long rate,
>  
>  const struct clk_ops clk_alpha_pll_postdiv_trion_ops = {
>         .recalc_rate = clk_trion_pll_postdiv_recalc_rate,
> -       .round_rate = clk_trion_pll_postdiv_round_rate,
> +       .determine_rate = clk_trion_pll_postdiv_determine_rate,
>         .set_rate = clk_trion_pll_postdiv_set_rate,
>  };
>  EXPORT_SYMBOL_GPL(clk_alpha_pll_postdiv_trion_ops);
>  
> -static long clk_alpha_pll_postdiv_fabia_round_rate(struct clk_hw *hw,
> -                               unsigned long rate, unsigned long *prate)
> +static int
> +clk_alpha_pll_postdiv_fabia_determine_rate(struct clk_hw *hw,
> +                                          struct clk_rate_request *req)
>  {
>         struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw);
>  
> -       return divider_round_rate(hw, rate, prate, pll->post_div_table,
> -                               pll->width, CLK_DIVIDER_ROUND_CLOSEST);
> +       req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate,
> +                                      pll->post_div_table, pll->width,
> +                                       CLK_DIVIDER_ROUND_CLOSEST);

divider_determine_rate()?

  reply	other threads:[~2023-07-19 20:04 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-10  9:32 [PATCH] clk: qcom: clk-alpha-pll: Use determine_rate instead of round_rate Devi Priya
2023-07-19 20:04 ` Stephen Boyd [this message]
2023-07-20  5:06   ` Devi Priya

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