From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Robin Murphy <robin.murphy@arm.com>, agross@kernel.org
Cc: andersson@kernel.org, konrad.dybcio@linaro.org, joro@8bytes.org,
will@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, robdclark@gmail.com,
linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
marijn.suijten@somainline.org, kernel@collabora.com,
luca@z3ntu.xyz, a39.skl@gmail.com, phone-devel@vger.kernel.org,
~postmarketos/upstreaming@lists.sr.ht
Subject: Re: [PATCH v2 3/8] iommu/arm-smmu: Add definition for ARM_SMMU_CB_FSRRESTORE
Date: Mon, 14 Nov 2022 11:48:56 +0100 [thread overview]
Message-ID: <f8f84113-c6f0-706c-cc87-4b57bacea059@collabora.com> (raw)
In-Reply-To: <d677f7c1-8c99-4bb0-d363-7a538b38a83a@arm.com>
Il 11/11/22 16:18, Robin Murphy ha scritto:
> On 11/11/2022 2:59 pm, AngeloGioacchino Del Regno wrote:
>> In preparation for adding a proper context bank reset sequence in
>> qcom_iommu, add a definition for the implementation defined Fault
>> Status Restore register (FSRRESTORE).
>
> It's not implementation defined, it's architectural. But I don't follow why we
> should need this. If we're resetting FSR, we don't need to restore any previous
> value to it; all we want to do is clear it, which we do already via its own mechanism.
>
The spec says "configurations" -> implementation defined whether the system
implements stage 1 translation.... and that's how I got confused about it, sorry.
Thanks for the review, this clears up my doubts: I can reset FSR without caring
about FSRRESTORE.
I'll send a v3 ASAP.
Regards,
Angelo
> Thanks,
> Robin.
>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> ---
>> drivers/iommu/arm/arm-smmu/arm-smmu.h | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h
>> b/drivers/iommu/arm/arm-smmu/arm-smmu.h
>> index 703fd5817ec1..5015138799c5 100644
>> --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h
>> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h
>> @@ -219,6 +219,7 @@ enum arm_smmu_cbar_type {
>> ARM_SMMU_FSR_TF | \
>> ARM_SMMU_FSR_IGN)
>> +#define ARM_SMMU_CB_FSRRESTORE 0x5c
>> #define ARM_SMMU_CB_FAR 0x60
>> #define ARM_SMMU_CB_FSYNR0 0x68
next prev parent reply other threads:[~2022-11-14 10:49 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-11 14:59 [PATCH v2 0/8] Add support for Qualcomm's legacy IOMMU v2 AngeloGioacchino Del Regno
2022-11-11 14:59 ` [PATCH v2 1/8] dt-bindings: iommu: qcom,iommu: Document qcom,ctx-num property AngeloGioacchino Del Regno
2022-11-14 8:18 ` Krzysztof Kozlowski
2022-11-11 14:59 ` [PATCH v2 2/8] iommu/qcom: Use the asid read from device-tree if specified AngeloGioacchino Del Regno
2022-11-11 14:59 ` [PATCH v2 3/8] iommu/arm-smmu: Add definition for ARM_SMMU_CB_FSRRESTORE AngeloGioacchino Del Regno
2022-11-11 15:18 ` Robin Murphy
2022-11-14 10:48 ` AngeloGioacchino Del Regno [this message]
2022-11-11 14:59 ` [PATCH v2 4/8] iommu/qcom: Properly reset the IOMMU context AngeloGioacchino Del Regno
2022-11-11 14:59 ` [PATCH v2 5/8] iommu/qcom: Index contexts by asid number to allow asid 0 AngeloGioacchino Del Regno
2022-11-11 14:59 ` [PATCH v2 6/8] dt-bindings: iommu: qcom,iommu: Document QSMMU v2 compatibles AngeloGioacchino Del Regno
2022-11-14 8:21 ` Krzysztof Kozlowski
2022-11-11 14:59 ` [PATCH v2 7/8] iommu/qcom: Add support for QSMMUv2 and QSMMU-500 secured contexts AngeloGioacchino Del Regno
2022-11-11 14:59 ` [PATCH v2 8/8] dt-bindings: iommu: qcom,iommu: Document MSM8976 compatible AngeloGioacchino Del Regno
2022-11-14 8:22 ` Krzysztof Kozlowski
2022-11-15 9:52 ` AngeloGioacchino Del Regno
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