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Thu, 11 Jul 2024 05:04:49 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 46B54miY013308 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 11 Jul 2024 05:04:48 GMT Received: from [10.216.6.181] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 10 Jul 2024 22:04:44 -0700 Message-ID: Date: Thu, 11 Jul 2024 10:34:24 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] arm64: dts: qcom: sa8775p: Add UART node To: Konrad Dybcio , Krzysztof Kozlowski , , , , , , , CC: , References: <20240710094149.13299-1-quic_vdadhani@quicinc.com> <2e309d52-8180-4922-9a5a-022fc8bf8ef5@kernel.org> Content-Language: en-US From: Viken Dadhaniya In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: NXiDcJW_jYI9lOXxVdsNPDzhOfMbWESO X-Proofpoint-GUID: NXiDcJW_jYI9lOXxVdsNPDzhOfMbWESO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-11_02,2024-07-10_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 bulkscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 priorityscore=1501 mlxlogscore=999 malwarescore=0 mlxscore=0 clxscore=1011 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407110032 On 7/10/2024 4:09 PM, Konrad Dybcio wrote: > On 10.07.2024 11:47 AM, Krzysztof Kozlowski wrote: >> On 10/07/2024 11:41, Viken Dadhaniya wrote: >>> Add missing UART configuration for sa8775. >>> >>> Signed-off-by: Viken Dadhaniya >>> --- >>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 231 ++++++++++++++++++++++++++ >>> 1 file changed, 231 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> index 23f1b2e5e624..c107ee40341d 100644 >>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> @@ -1,6 +1,7 @@ >>> // SPDX-License-Identifier: BSD-3-Clause >>> /* >>> * Copyright (c) 2023, Linaro Limited >>> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. >>> */ >>> >>> #include >>> @@ -657,6 +658,21 @@ >>> status = "disabled"; >>> }; >>> >>> + uart14: serial@880000 { >>> + compatible = "qcom,geni-uart"; >>> + reg = <0x0 0x00880000 0x0 0x4000>; >>> + interrupts = ; >>> + clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; >>> + clock-names = "se"; >>> + interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS >>> + &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>, >>> + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS >>> + &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>; >>> + interconnect-names = "qup-core", "qup-config"; >>> + power-domains = <&rpmhpd SA8775P_CX>; >> >> All the clocks, interconenct and power domains look to me questionable. >> AFAIK, most of it (if not all) is going to be removed. > > Yeah.. I'm lukewarm on accepting any sa8775p changes until that qcs9100(?) > situation is squared out first > > Konrad Thanks for clarification. Please help to sign-off or let me know in case of any concern.