Re: [PATCH v5 3/4] dt-bindings: PCI: qcom,pcie-sa8255p: Document ECAM compliant PCIe root complex

[Mayank Rana <mayank.rana@oss.qualcomm.com>]

On 7/15/2025 11:16 AM, Bjorn Helgaas wrote:
> On Mon, Jun 16, 2025 at 03:42:58PM -0700, Mayank Rana wrote:
>> Document the required configuration to enable the PCIe root complex on
>> SA8255p, which is managed by firmware using power-domain based handling
>> and configured as ECAM compliant.
>>
>> Signed-off-by: Mayank Rana <mayank.rana@oss.qualcomm.com>
>> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
>> ---
>>   .../bindings/pci/qcom,pcie-sa8255p.yaml       | 122 ++++++++++++++++++
>>   1 file changed, 122 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml
>> new file mode 100644
>> index 000000000000..88c8f012708c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml
>> @@ -0,0 +1,122 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/pci/qcom,pcie-sa8255p.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm SA8255p based firmware managed and ECAM compliant PCIe Root Complex
>> +
>> +maintainers:
>> +  - Bjorn Andersson <andersson@kernel.org>
>> +  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
>> +
>> +description:
>> +  Qualcomm SA8255p SoC PCIe root complex controller is based on the Synopsys
>> +  DesignWare PCIe IP which is managed by firmware, and configured in ECAM mode.
>> +
>> +properties:
>> +  compatible:
>> +    const: qcom,pcie-sa8255p
>> +
>> +  reg:
>> +    description:
>> +      The Configuration Space base address and size, as accessed from the parent
>> +      bus. The base address corresponds to the first bus in the "bus-range"
>> +      property. If no "bus-range" is specified, this will be bus 0 (the
>> +      default).
> 
> Do you mind if I add "ECAM" to this description, e.g.,
>    The base address and size of the ECAM area for accessing PCI
>    Configuration Space, as accessed from the parent bus.
> 
> I think having the "ECAM" keyword would make this easier to grep for.
I agree that it helps clarify the intended usage. Please help with 
updating the description.

Regards,
Mayank