From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Rob Clark <robdclark@gmail.com>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Jonathan Marek <jonathan@marek.ca>
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Rob Clark <robdclark@chromium.org>
Subject: Re: [PATCH v3 4/4] drm/msm/dsi/phy: Define PHY_CMN_CLK_CFG[01] bitfields and simplify saving
Date: Sun, 16 Feb 2025 10:46:43 +0100 [thread overview]
Message-ID: <fb610a26-aafe-4a76-a577-9e659ae54930@linaro.org> (raw)
In-Reply-To: <20250214-drm-msm-phy-pll-cfg-reg-v3-4-0943b850722c@linaro.org>
On 14/02/2025 16:08, Krzysztof Kozlowski wrote:
> Add bitfields for PHY_CMN_CLK_CFG0 and PHY_CMN_CLK_CFG1 registers to
> avoid hard-coding bit masks and shifts and make the code a bit more
> readable. While touching the lines in dsi_7nm_pll_save_state()
> resulting cached->pix_clk_div assignment would be too big, so just
> combine pix_clk_div and bit_clk_div into one cached state to make
> everything simpler.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> ---
>
> Changes in v3:
> 1. Use FIELD_GET
I have LKP build reports here, so this or some earlier patches need
bitfield.h header.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-02-16 9:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-14 15:08 [PATCH v3 0/4] drm/msm/dsi/phy: Improvements around concurrent PHY_CMN_CLK_CFG[01] Krzysztof Kozlowski
2025-02-14 15:08 ` [PATCH v3 1/4] drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG0 updated from driver side Krzysztof Kozlowski
2025-02-14 15:08 ` [PATCH v3 2/4] drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG1 against clock driver Krzysztof Kozlowski
2025-02-14 15:18 ` Dmitry Baryshkov
2025-02-15 17:39 ` Abhinav Kumar
2025-02-14 15:08 ` [PATCH v3 3/4] drm/msm/dsi/phy: Do not overwite PHY_CMN_CLK_CFG1 when choosing bitclk source Krzysztof Kozlowski
2025-02-14 15:19 ` Dmitry Baryshkov
2025-02-15 17:41 ` Abhinav Kumar
2025-02-14 15:08 ` [PATCH v3 4/4] drm/msm/dsi/phy: Define PHY_CMN_CLK_CFG[01] bitfields and simplify saving Krzysztof Kozlowski
2025-02-14 15:20 ` Dmitry Baryshkov
2025-02-17 11:51 ` Krzysztof Kozlowski
2025-02-16 9:46 ` Krzysztof Kozlowski [this message]
2025-02-18 1:23 ` (subset) [PATCH v3 0/4] drm/msm/dsi/phy: Improvements around concurrent PHY_CMN_CLK_CFG[01] Abhinav Kumar
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