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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id f17-20020a1709064dd100b0087276f66c6asm1417029ejw.115.2023.02.03.06.09.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Feb 2023 06:09:52 -0800 (PST) Message-ID: Date: Fri, 3 Feb 2023 16:09:50 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [PATCH v2 12/27] drm/msm/dpu: remove dpu_hw_fmt_layout from struct dpu_hw_pipe_cfg Content-Language: en-GB To: Abhinav Kumar Cc: Rob Clark , Sean Paul , Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org References: <20221229191856.3508092-1-dmitry.baryshkov@linaro.org> <20221229191856.3508092-13-dmitry.baryshkov@linaro.org> <77764494-8a74-8450-ac75-33d6de0b2f8d@quicinc.com> <62ace381-2c59-9096-2b4f-412b329ad78e@quicinc.com> From: Dmitry Baryshkov In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 02/02/2023 22:14, Abhinav Kumar wrote: > > > On 2/2/2023 12:10 PM, Dmitry Baryshkov wrote: >> On 02/02/2023 21:54, Abhinav Kumar wrote: >>> >>> >>> On 2/2/2023 11:45 AM, Dmitry Baryshkov wrote: >>>> On Thu, 2 Feb 2023 at 21:38, Abhinav Kumar >>>> wrote: >>>>> >>>>> >>>>> >>>>> On 12/29/2022 11:18 AM, Dmitry Baryshkov wrote: >>>>>> Remove dpu_hw_fmt_layout instance from struct dpu_hw_pipe_cfg, >>>>>> leaving >>>>>> only src_rect and dst_rect. This way right and left pipes will have >>>>>> separate dpu_hw_pipe_cfg isntances, while the layout is common to >>>>>> both >>>>>> of them. >>>>>> >>>>> >>>>> Sorry for not responding to this comment earlier. >>>>> >>>>> https://patchwork.freedesktop.org/patch/473168/?series=99909&rev=1#comment_875370 >>>>> >>>>>   From the perspective of wide planes you are right that the layout is >>>>> common but not true from smart DMA point of view. >>>>> >>>>> For wide planes, yes, its usually the same buffer with just the src_x >>>>> being different but conceptually and even HW wise each rectangle of >>>>> the >>>>> smart DMA is capable of fetching from a different buffer. >>>>> >>>>>   From the pov, this decision of not having the dpu_hw_fmt_layout >>>>> as part >>>>> of dpu_hw_pipe_cfg seems incorrect to me. >>>> >>>> Yes, each rectangle/pipe can fetch from a different buffer. However in >>>> our use case the layout is not defined for each pipe. It is defined >>>> for a plane, no matter how many pipes are used for the plane, since >>>> the buffer is also defined per plane. >>>> >>> Even if the layout is defined per plane. >>> >>> So lets say >>> >>> plane A with layout A maps to rect 1 of DMA0 >>> plane B with layout B maps to rect 2 of DMA0 >>> >>> How can layout be assumed to be duplicated in this case? >>> >>> This is not a wide plane use-case but just smartDMA case of two >>> different layers. >>> >>> Maybe I am missing something but this is the example i am interested >>> about. >> >> PlaneA has layoutA. So dpu_plane_sspp_update_pipe() will program >> layoutA using (DMA0, rect1)->setup_sourceaddress(layoutA). >> >> PlaneB has layoutB, so (DMA0, rect2)->setup_sourceaddress(layoutB). >> >> Maybe the commit message is misleading. The layout is not common to >> rect1 and rect2. It is common to all pipes/rectangles driving a single >> plane. >> > > Ack, Its clear now. > > Reviewed-by: Abhinav Kumar I have rephrased the last sentence of the commit message in the following way. Hopefully it will be cleaner now: This way all the pipes used by the plane will have a common layout instance (as the framebuffer is shared between them), while still keeping a separate src/dst rectangle configuration for each pipe. -- With best wishes Dmitry