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From: Taniya Das <taniya.das@oss.qualcomm.com>
To: Val Packett <val@packett.cool>,
	Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] clk: qcom: gcc-x1e80100: Enable runtime PM
Date: Tue, 21 Oct 2025 14:59:21 +0530	[thread overview]
Message-ID: <fda2da11-719b-4552-ab5c-d197c9f29092@oss.qualcomm.com> (raw)
In-Reply-To: <20251012230822.16825-1-val@packett.cool>



On 10/13/2025 4:36 AM, Val Packett wrote:
> Enable the main clock controller driver to participate in runtime
> power management.
> 
> Signed-off-by: Val Packett <val@packett.cool>
> ---
> Seems like this would be one of the prerequisites for actually reaching
> deeper power states.. I've been running with this patch on a Dell
> Latitude 7455 for quite a while, did not see any harm for sure.
> ---
>  drivers/clk/qcom/gcc-x1e80100.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/clk/qcom/gcc-x1e80100.c b/drivers/clk/qcom/gcc-x1e80100.c
> index 301fc9fc32d8..96bb604c6378 100644
> --- a/drivers/clk/qcom/gcc-x1e80100.c
> +++ b/drivers/clk/qcom/gcc-x1e80100.c
> @@ -6721,6 +6721,7 @@ static const struct qcom_cc_desc gcc_x1e80100_desc = {
>  	.num_resets = ARRAY_SIZE(gcc_x1e80100_resets),
>  	.gdscs = gcc_x1e80100_gdscs,
>  	.num_gdscs = ARRAY_SIZE(gcc_x1e80100_gdscs),
> +	.use_rpm = true,

This is not required to be set for the global clock controller as 'CX'
is the rail powering this clock controller.

>  };
>  
>  static const struct of_device_id gcc_x1e80100_match_table[] = {

-- 
Thanks,
Taniya Das


  reply	other threads:[~2025-10-21  9:29 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-12 23:06 [PATCH] clk: qcom: gcc-x1e80100: Enable runtime PM Val Packett
2025-10-21  9:29 ` Taniya Das [this message]
2025-10-29  9:56 ` Konrad Dybcio

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