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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5d9904a411csm1604300a12.72.2025.01.10.04.31.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 10 Jan 2025 04:31:02 -0800 (PST) Message-ID: Date: Fri, 10 Jan 2025 13:31:00 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 6/6] arm64: dts: qcom: Enable cpu cooling devices for QCS9075 platforms To: Dmitry Baryshkov , Manaf Meethalavalappu Pallikunhi Cc: Wasim Nazir , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com References: <20241229152332.3068172-1-quic_wasimn@quicinc.com> <20241229152332.3068172-7-quic_wasimn@quicinc.com> <07c41571-28ca-6f9e-bcee-899bbf77f687@quicinc.com> <6zftdu5myuporxsvxlxhojnlhnfa74pjj7nvy3wmiaw7jdsuo2@3ebcpevzvtlc> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <6zftdu5myuporxsvxlxhojnlhnfa74pjj7nvy3wmiaw7jdsuo2@3ebcpevzvtlc> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: 9CJYCPhhAGwXtxx8MH3eik-ena3Ju5lQ X-Proofpoint-GUID: 9CJYCPhhAGwXtxx8MH3eik-ena3Ju5lQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 spamscore=0 phishscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 lowpriorityscore=0 impostorscore=0 bulkscore=0 adultscore=0 clxscore=1015 mlxlogscore=978 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501100098 On 10.01.2025 12:54 AM, Dmitry Baryshkov wrote: > On Wed, Jan 08, 2025 at 09:38:19PM +0530, Manaf Meethalavalappu Pallikunhi wrote: >> >> Hi Dmitry, >> >> >> On 1/8/2025 6:16 PM, Dmitry Baryshkov wrote: >>> On Wed, Jan 08, 2025 at 05:57:06PM +0530, Manaf Meethalavalappu Pallikunhi wrote: >>>> Hi Dmitry, >>>> >>>> >>>> On 1/3/2025 11:21 AM, Dmitry Baryshkov wrote: >>>>> On Tue, Dec 31, 2024 at 05:31:41PM +0530, Manaf Meethalavalappu Pallikunhi wrote: >>>>>> Hi Dmitry, >>>>>> >>>>>> On 12/30/2024 9:10 PM, Dmitry Baryshkov wrote: >>>>>>> On Sun, Dec 29, 2024 at 08:53:32PM +0530, Wasim Nazir wrote: >>>>>>>> From: Manaf Meethalavalappu Pallikunhi >>>>>>>> >>>>>>>> In QCS9100 SoC, the safety subsystem monitors all thermal sensors and >>>>>>>> does corrective action for each subsystem based on sensor violation >>>>>>>> to comply safety standards. But as QCS9075 is non-safe SoC it >>>>>>>> requires conventional thermal mitigation to control thermal for >>>>>>>> different subsystems. >>>>>>>> >>>>>>>> The cpu frequency throttling for different cpu tsens is enabled in >>>>>>>> hardware as first defense for cpu thermal control. But QCS9075 SoC >>>>>>>> has higher ambient specification. During high ambient condition, even >>>>>>>> lowest frequency with multi cores can slowly build heat over the time >>>>>>>> and it can lead to thermal run-away situations. This patch restrict >>>>>>>> cpu cores during this scenario helps further thermal control and >>>>>>>> avoids thermal critical violation. >>>>>>>> >>>>>>>> Add cpu idle injection cooling bindings for cpu tsens thermal zones >>>>>>>> as a mitigation for cpu subsystem prior to thermal shutdown. >>>>>>>> >>>>>>>> Add cpu frequency cooling devices that will be used by userspace >>>>>>>> thermal governor to mitigate skin thermal management. >>>>>>> Does anything prevent us from having this config as a part of the basic >>>>>>> sa8775p.dtsi setup? If HW is present in the base version but it is not >>>>>>> accessible for whatever reason, please move it the base device config >>>>>>> and use status "disabled" or "reserved" to the respective board files. >>>>>> Sure,  I will move idle injection node for each cpu to sa8775p.dtsi and keep >>>>>> it disabled state. #cooling cells property for CPU, still wanted to keep it >>>>>> in board files as we don't want to enable any cooling device in base DT. >>>>> "we don't want" is not a proper justification. So, no. >>>> As noted in the commit, thermal cooling mitigation is only necessary for >>>> non-safe SoCs. Adding this cooling cell property to the CPU node in the base >>>> DT (sa8775p.dtsi), which is shared by both safe and non-safe SoCs, would >>>> violate the requirements for safe SoCs. Therefore, we will include it only >>>> in non-safe SoC boards. >>> "is only necessary" is fine. It means that it is an optional part which >>> is going to be unused / ignored / duplicate functionality on the "safe" >>> SoCs. What kind of requirement is going to be violated in this way? >> >> From the perspective of a safe SoC, any software mitigation that compromises >> the safety subsystem’s compliance should not be allowed. Enabling the >> cooling device also opens up the sysfs interface for userspace, which we may >> not fully control. > > THere are a lot of interfaces exported to the userspace. > >> Userspace apps or partner apps might inadvertently use >> it. Therefore, we believe it is better not to expose such an interface, as >> it is not required for that SoC and helps to avoid opening up an interface >> that could potentially lead to a safety failure. > > How can thermal mitigation interface lead to safety failure? Userspace > can possibly lower trip points, but it can not override existing > firmware-based mitigation. > And if there is a known problem with the interface, it should be fixed > instead. I think the intended case to avoid is where a malicious actor would set the trips too low, resulting in throttling down the CPU to FMIN / Linux throttling CPUs to try and escape what it believes to be possible thermal runaway / a system reboot. Not something desired in a car. Konrad