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Fri, 30 Aug 2024 14:51:10 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 47UEp9BP025912 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 30 Aug 2024 14:51:09 GMT Received: from [10.110.28.107] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 30 Aug 2024 07:51:05 -0700 Message-ID: Date: Fri, 30 Aug 2024 07:51:05 -0700 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 21/22] ARM: dt: GIC: add extended SPI specifier To: Rob Herring CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , References: <20240828203721.2751904-1-quic_nkela@quicinc.com> <20240828203721.2751904-22-quic_nkela@quicinc.com> <20240829185240.GA914553-robh@kernel.org> Content-Language: en-US From: Nikunj Kela In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 6b-3vOaXGsYsKH_DEtulg_cOaF8YTRTW X-Proofpoint-GUID: 6b-3vOaXGsYsKH_DEtulg_cOaF8YTRTW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-30_09,2024-08-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 adultscore=0 suspectscore=0 lowpriorityscore=0 mlxlogscore=831 spamscore=0 priorityscore=1501 bulkscore=0 mlxscore=0 malwarescore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2408300113 On 8/30/2024 7:44 AM, Rob Herring wrote: > On Thu, Aug 29, 2024 at 2:02 PM Nikunj Kela wrote: >> >> On 8/29/2024 11:52 AM, Rob Herring wrote: >>> On Wed, Aug 28, 2024 at 01:37:20PM -0700, Nikunj Kela wrote: >>>> Add interrupt specifier for extended SPI interrupts. >>> What's an "extended SPI"? Is this a GIC spec thing? If so, what version? >> Extended SPI is an extended range of SPI interrupts supported by GIC. >> >> Excerpt below from >> Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml >> >> "The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI >> interrupts, 2 for interrupts in the Extended SPI range, 3 for the >> Extended PPI range. Other values are reserved for future use." >> >> "The 2nd cell contains the interrupt number for the interrupt type. SPI >> interrupts are in the range [0-987]. PPI interrupts are in the range >> [0-15]. Extented SPI interrupts are in the range [0-1023]. Extended PPI >> interrupts are in the range [0-127]." > Looks like you should add EPPI define too while you're here. > > Rob Sure Rob. I can add that. Generally, there is an ask for a usecase before we push anything that is used in DT. I won't have any usecase to show for EPPI.