From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1030DC4321E for ; Mon, 5 Dec 2022 17:05:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231262AbiLERFS (ORCPT ); Mon, 5 Dec 2022 12:05:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33618 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230090AbiLERFR (ORCPT ); Mon, 5 Dec 2022 12:05:17 -0500 Received: from mail-io1-xd29.google.com (mail-io1-xd29.google.com [IPv6:2607:f8b0:4864:20::d29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A26BA18E31 for ; Mon, 5 Dec 2022 09:05:16 -0800 (PST) Received: by mail-io1-xd29.google.com with SMTP id g20so820393iob.2 for ; Mon, 05 Dec 2022 09:05:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=lBsWJdEyTcuwpEnxkS0g/cQVHzZVdet/q+AyHt5eobU=; b=MmPXGeK5CW4Jdw0h18AOV8z66gLVDSJ18w010JRdzuyxfVTC8ZmYJP4ZSdaYLtG2h3 qRnPS5BvGyNNcPFAgxtrnS3m+lrpvKAHzoBJAuI0+odS6abiQOBWZf+fkr6CYjOZWHCw U4fNLWrHTIhHIBaW1i0LKwmTr4SwUjprslZfKrladKwpbHNEZ7D/isOzHl6V09O7ZniL faYIC9JrkxNuhIYAmVpCXcjjIqj58jE/91MYlbu41BxWIT1fWNrUFqEAQrS78kMJcTOQ JDLVKEFIuFw903jREHALao4nDnnsPZQzegnvYol9T9Z1KKPXikH4sDEYm31eNxhvGjPd NqmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=lBsWJdEyTcuwpEnxkS0g/cQVHzZVdet/q+AyHt5eobU=; b=gqIbWgTz1/qtOv/OOgehF3rAG7Wd8bxX8kGlfs3TY9sOQwrbwB+gmSEE8+Nk2DdWcn agjYPISCJFA9pt7wH2S+Py0ixrkC/3E8bs0XQFzjMahqw9C2swLiLrq/1/xz+pZcEi52 rJ3lA7vJVvOupOPocQ5Bjk7/DoN9fnyiyIT4+1zwdRxrE5j92l0SLbbtUIEtvRQ1MY4M O7CFlqerqcnnLRZsd9Y5oXJMGcuOIvgGxyg1fvH3Zr8eq+Fq+oNpUOUuOJDgBAFaC9+5 HQ7Pob+TvO9BsU4al7l3M/2kzr/BFNez7ljZP7Bahz7SOhaaHl4ZAp6YVJ4rKvjcGkMW 6LKA== X-Gm-Message-State: ANoB5pn0wvLZCWZiLcNZMtm+1LsHTXauZIQv/MU/MH9+nBFY11dem9rV AAxEqLXGGEK2A3Ldwymqjlp19A== X-Google-Smtp-Source: AA0mqf5WyI298T6Pa9+EW2WppKU6rIB+FJ30W80xnWttM9Ujymne6zt7QYc/Fr6BbrM1f1blLdHmuw== X-Received: by 2002:a5d:8403:0:b0:6e0:5eb:b5b4 with SMTP id i3-20020a5d8403000000b006e005ebb5b4mr3551216ion.215.1670259915901; Mon, 05 Dec 2022 09:05:15 -0800 (PST) Received: from [172.22.22.4] ([98.61.227.136]) by smtp.googlemail.com with ESMTPSA id co25-20020a0566383e1900b0038a382d84c5sm2422785jab.64.2022.12.05.09.05.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 05 Dec 2022 09:05:15 -0800 (PST) Message-ID: Date: Mon, 5 Dec 2022 11:05:14 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH 11/16] clk: qcom: smd-rpm: simplify XO_BUFFER clocks definitions Content-Language: en-US To: Dmitry Baryshkov , Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org References: <20221203175808.859067-1-dmitry.baryshkov@linaro.org> <20221203175808.859067-12-dmitry.baryshkov@linaro.org> From: Alex Elder In-Reply-To: <20221203175808.859067-12-dmitry.baryshkov@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 12/3/22 11:58 AM, Dmitry Baryshkov wrote: > Remove the duplication between the names of the normal and active-only > XO_BUFFER and XO_BUFFER_PINCTRL clocks by using preprocessor logic to > add _a suffix. > > Signed-off-by: Dmitry Baryshkov This is nice. See two comments below. Reviewed-by: Alex Elder > --- > drivers/clk/qcom/clk-smd-rpm.c | 54 +++++++++++++++++----------------- > 1 file changed, 27 insertions(+), 27 deletions(-) > > diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c > index cb47d69889fb..9f33dbd60e96 100644 > --- a/drivers/clk/qcom/clk-smd-rpm.c > +++ b/drivers/clk/qcom/clk-smd-rpm.c > @@ -112,17 +112,17 @@ > __DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id, \ > QCOM_RPM_SMD_KEY_STATE) > > -#define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, _active, r_id, r) \ > - __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active, \ > +#define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, r_id, r) \ > + __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _name##_a, \ > QCOM_SMD_RPM_CLK_BUF_A, r_id, r, \ > QCOM_RPM_KEY_SOFTWARE_ENABLE) > > -#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name, _active, \ > +#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name, \ > r_id, r) \ Can the above line be merged with its predecessor? (I now have looked at later patches, and I see you add a new argument that makes this original alignment still make sense. If that's why you didn't here, you've done the right thing.) > - DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, _active, \ > + DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, \ > r_id, r); \ Same comment here. > __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name##_pin, \ > - _active##_pin, \ > + _name##_a##_pin, \ > QCOM_SMD_RPM_CLK_BUF_A, r_id, r, \ > QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY) > > @@ -456,28 +456,28 @@ DEFINE_CLK_SMD_RPM(qcs404, qpic_clk, qpic_a_clk, QCOM_SMD_RPM_QPIC_CLK, 0); > > DEFINE_CLK_SMD_RPM(sm6125, qup_clk, qup_a_clk, QCOM_SMD_RPM_QUP_CLK, 0); > > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk1, bb_clk1_a, 1, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk2, bb_clk2_a, 2, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk1, ln_bb_clk1_a, 1, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk2, ln_bb_clk2_a, 2, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk1, rf_clk1_a, 4, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2, rf_clk2_a, 5, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3, rf_clk3_a, 6, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk, ln_bb_clk_a, 8, 19200000); > - > -DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, rf_clk3_a, 6, 38400000); > - > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0, cxo_d0_a, 1, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1, cxo_d1_a, 2, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0, cxo_a0_a, 4, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1, cxo_a1_a, 5, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2, cxo_a2_a, 6, 19200000); > - > -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, diff_clk_a, 7, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, div_clk1_a, 11, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, div_clk2_a, 12, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, div_clk3_a, 13, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk1, 1, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk2, 2, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk1, 1, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk2, 2, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3, 3, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk1, 4, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2, 5, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3, 6, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk, 8, 19200000); > + > +DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, 6, 38400000); > + > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0, 1, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1, 2, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0, 4, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1, 5, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2, 6, 19200000); > + > +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, 7, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, 11, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, 12, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, 13, 19200000); > > static struct clk_smd_rpm *msm8909_clks[] = { > [RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,