From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eddie James Date: Fri, 27 Sep 2019 15:58:49 -0500 Subject: [PATCH v2 4/4] ARM: dts: aspeed: ast2600: Add SCU interrupt controllers In-Reply-To: <1569617929-29055-1-git-send-email-eajames@linux.ibm.com> References: <1569617929-29055-1-git-send-email-eajames@linux.ibm.com> Message-ID: <1569617929-29055-5-git-send-email-eajames@linux.ibm.com> List-Id: To: linux-aspeed@lists.ozlabs.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Add nodes for the interrupt controllers provided by the SCU. Signed-off-by: Eddie James --- arch/arm/boot/dts/aspeed-g6.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index 3a1422f..d89f1e6 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -159,6 +159,24 @@ compatible = "aspeed,ast2600-smpmem"; reg = <0x180 0x40>; }; + + scu_ic0: interrupt-controller at 0 { + #interrupt-cells = <1>; + compatible = "aspeed,ast2600-scu-ic0"; + reg = <0x560 0x4>; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-controller; + }; + + scu_ic1: interrupt-controller at 1 { + #interrupt-cells = <1>; + compatible = "aspeed,ast2600-scu-ic1"; + reg = <0x570 0x4>; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-controller; + }; }; rng: hwrng at 1e6e2524 { -- 1.8.3.1