From: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
To: Linus Walleij <linusw@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
Billy Tsai <billy_tsai@aspeedtech.com>
Cc: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] gpio: aspeed: fix AST2700 debounce selector bit definitions
Date: Mon, 20 Apr 2026 11:15:57 +0200 [thread overview]
Message-ID: <177667655421.14099.13456882135654197877.b4-ty@oss.qualcomm.com> (raw)
In-Reply-To: <20260415-gpio-fix-v1-1-b08a89b31e6f@aspeedtech.com>
On Wed, 15 Apr 2026 18:24:42 +0800, Billy Tsai wrote:
> The AST2700 datasheet defines reg_debounce_sel1 as the low bit and
> reg_debounce_sel2 as the high bit. The current driver uses the AST2600
> mapping instead, where sel1 is the high bit and sel2 is the low bit.
>
> As a result, the debounce selector bits are programmed in reverse on
> AST2700. Swap the G7 sel1/sel2 bit definitions so the driver matches the
> hardware definition.
>
> [...]
Applied, thanks!
[1/1] gpio: aspeed: fix AST2700 debounce selector bit definitions
https://git.kernel.org/brgl/c/e31eee4a961077d60ef2362507240c6743c1c2ae
Best regards,
--
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
prev parent reply other threads:[~2026-04-20 9:45 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-15 10:24 [PATCH] gpio: aspeed: fix AST2700 debounce selector bit definitions Billy Tsai
2026-04-20 9:15 ` Bartosz Golaszewski [this message]
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