* [PATCH] ARM: dts: aspeed: Fix hwrng register address
@ 2018-05-30 6:17 Joel Stanley
2018-06-02 8:19 ` Olof Johansson
0 siblings, 1 reply; 2+ messages in thread
From: Joel Stanley @ 2018-05-30 6:17 UTC (permalink / raw)
To: linux-aspeed
The register address should be the full address of the rng, not the
offset from the start of the SCU.
Fixes: 5daa8212c08e ("ARM: dts: aspeed: Describe random number device")
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
Hi ARM maintainers, this was found when testing next-20180529 after the
merge of the aspeed 4.18 pull request. Can you please apply this one to
your -next tree?
I'll also send a PR with some defconfig updates so the rng driver is
enabled by default.
---
arch/arm/boot/dts/aspeed-g4.dtsi | 4 ++--
arch/arm/boot/dts/aspeed-g5.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 5e947ed496c2..75df1573380e 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -145,9 +145,9 @@
};
- rng: hwrng at 78 {
+ rng: hwrng at 1e6e2078 {
compatible = "timeriomem_rng";
- reg = <0x78 0x4>;
+ reg = <0x1e6e2078 0x4>;
period = <1>;
quality = <100>;
};
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 24eec00c4a95..17f2714d18a7 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -189,9 +189,9 @@
};
};
- rng: hwrng at 78 {
+ rng: hwrng at 1e6e2078 {
compatible = "timeriomem_rng";
- reg = <0x78 0x4>;
+ reg = <0x1e6e2078 0x4>;
period = <1>;
quality = <100>;
};
--
2.17.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH] ARM: dts: aspeed: Fix hwrng register address
2018-05-30 6:17 [PATCH] ARM: dts: aspeed: Fix hwrng register address Joel Stanley
@ 2018-06-02 8:19 ` Olof Johansson
0 siblings, 0 replies; 2+ messages in thread
From: Olof Johansson @ 2018-06-02 8:19 UTC (permalink / raw)
To: linux-aspeed
On Wed, May 30, 2018 at 03:47:40PM +0930, Joel Stanley wrote:
> The register address should be the full address of the rng, not the
> offset from the start of the SCU.
>
> Fixes: 5daa8212c08e ("ARM: dts: aspeed: Describe random number device")
> Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
> Hi ARM maintainers, this was found when testing next-20180529 after the
> merge of the aspeed 4.18 pull request. Can you please apply this one to
> your -next tree?
Certainly, applied to our next/dt branch now.
Thanks,
-Olof
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