Aspeed UART routing driver

Aspeed UART routing driver

[Oskar Senft]

Hi

As discussed with Andrew, we have a use case that requires the UART
routing on the AST2500 to be configured at runtime.

After talking with Linus Walleij, we concluded that the pinmux driver is
not a good match for this use case.

I went ahead and implemented a "UART routing control driver" for the
AST2500. It may just work on the AST2400 as is, but I don't have a
system to test on.

Thanks
Oskar.

[PATCH 1/2] misc: aspeed: Add Aspeed UART routing control driver.

[Oskar Senft]

This driver adds sysfs files that allow the BMC userspace to configure
how UARTs and physical serial I/O ports are routed.

Tested: Checked correct behavior (both read & write) on TYAN S7106
board by manually changing routing settings and confirming that bits
flow as expected. Tested for UART1 and UART3 as this board doesn't have
the other UARTs wired up in a testable way.

Signed-off-by: Oskar Senft <osk@google.com>
---
 .../stable/sysfs-driver-aspeed-uart-routing   |  14 +
 .../misc-devices/aspeed-uart-routing.txt      |  49 +++
 drivers/misc/Kconfig                          |  10 +
 drivers/misc/Makefile                         |   1 +
 drivers/misc/aspeed-uart-routing.c            | 384 ++++++++++++++++++
 5 files changed, 458 insertions(+)
 create mode 100644 Documentation/ABI/stable/sysfs-driver-aspeed-uart-routing
 create mode 100644 Documentation/misc-devices/aspeed-uart-routing.txt
 create mode 100644 drivers/misc/aspeed-uart-routing.c

diff --git a/Documentation/ABI/stable/sysfs-driver-aspeed-uart-routing b/Documentation/ABI/stable/sysfs-driver-aspeed-uart-routing
new file mode 100644
index 000000000000..5068737d9c12
--- /dev/null
+++ b/Documentation/ABI/stable/sysfs-driver-aspeed-uart-routing
@@ -0,0 +1,14 @@
+What:		/sys/bus/platform/drivers/aspeed-uart-routing/*/io*
+Date:		August 2018
+Contact:	Oskar Senft <osk@google.com>
+Description:	Configures the input source for the specific physical
+		serial I/O port.
+Users:		OpenBMC.  Proposed changes should be mailed to
+		openbmc at lists.ozlabs.org
+
+What:		/sys/bus/platform/drivers/aspeed-uart-routing/*/uart*
+Date:		August 2018
+Contact:	Oskar Senft <osk@google.com>
+Description:	Configures the input source for the specific UART.
+Users:		OpenBMC.  Proposed changes should be mailed to
+		openbmc at lists.ozlabs.org
diff --git a/Documentation/misc-devices/aspeed-uart-routing.txt b/Documentation/misc-devices/aspeed-uart-routing.txt
new file mode 100644
index 000000000000..afaf17cb7eda
--- /dev/null
+++ b/Documentation/misc-devices/aspeed-uart-routing.txt
@@ -0,0 +1,49 @@
+Kernel driver aspeed-uart-routing
+=================================
+
+Supported chips:
+ASPEED AST2500
+
+Author:
+Google LLC
+
+Description
+-----------
+
+The Aspeed AST2500 allows to dynamically route the inputs for the built-in
+UARTS and physical serial I/O ports.
+
+This allows, for example, to connect the output of UART to another UART.
+This can be used to enable host<->BMC communication via UARTs, e.g. to allow
+access to the host's serial console.
+
+This driver is for the BMC side. The sysfs files allow the BMC userspace
+which owns the system configuration policy, to configure how UARTs and
+physical serial I/O ports are routed.
+
+The driver provides the following files in sysfs:
+uart1		Configure the input signal to UART1.
+uart2		Configure the input signal to UART2.
+uart3		Configure the input signal to UART3.
+uart4		Configure the input signal to UART4.
+uart5		Configure the input signal to UART5.
+io1		Configure the input signal to physical serial port 1.
+io2		Configure the input signal to physical serial port 2.
+io3		Configure the input signal to physical serial port 3.
+io4		Configure the input signal to physical serial port 4.
+io5		Configure the input signal to physical serial port 5.
+
+When read, each file shows the list of available options with the currently
+selected option marked by square brackets "[]". The list of available options
+depends on the selected file.
+
+Example:
+$ cat /sys/bus/platform/drivers/aspeed-uart-routing/*.uart_routing/uart1
+[io1] io2 io3 io4 uart2 uart3 uart4 io6
+
+In this case, UART1 gets its input signal from IO1 (physical serial port 1).
+
+$ echo -n "uart3" \
+  >/sys/bus/platform/drivers/aspeed-uart-routing/*.uart_routing/uart1
+$ cat /sys/bus/platform/drivers/aspeed-uart-routing/*.uart_routing/uart1
+io1 io2 io3 io4 uart2 [uart3] uart4 io6
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 3726eacdf65d..89d42cd6b790 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -501,6 +501,16 @@ config ASPEED_LPC_SNOOP
 	  allows the BMC to listen on and save the data written by
 	  the host to an arbitrary LPC I/O port.
 
+config ASPEED_UART_ROUTING
+	tristate "Aspeed ast2500 UART routing control"
+	depends on (ARCH_ASPEED || COMPILE_TEST)
+	help
+	  Provides a driver to configure UART routing on Aspeed BMC platforms
+	  at runtime through sysfs. This allows, for example, to connect the
+	  output of UART to another UART. This can be used to enable host<->BMC
+	  communication via UARTs, e.g. to allow access to the host's serial
+	  console.
+
 config PCI_ENDPOINT_TEST
 	depends on PCI
 	select CRC32
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index af22bbc3d00c..9705182b317f 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG)	+= vexpress-syscfg.o
 obj-$(CONFIG_CXL_BASE)		+= cxl/
 obj-$(CONFIG_ASPEED_LPC_CTRL)	+= aspeed-lpc-ctrl.o
 obj-$(CONFIG_ASPEED_LPC_SNOOP)	+= aspeed-lpc-snoop.o
+obj-$(CONFIG_ASPEED_UART_ROUTING)	+= aspeed-uart-routing.o
 obj-$(CONFIG_PCI_ENDPOINT_TEST)	+= pci_endpoint_test.o
 obj-$(CONFIG_OCXL)		+= ocxl/
 obj-$(CONFIG_MISC_RTSX)		+= cardreader/
diff --git a/drivers/misc/aspeed-uart-routing.c b/drivers/misc/aspeed-uart-routing.c
new file mode 100644
index 000000000000..381bac19e4af
--- /dev/null
+++ b/drivers/misc/aspeed-uart-routing.c
@@ -0,0 +1,384 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * UART Routing driver for Aspeed AST2500
+ *
+ * Copyright (c) 2018 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+
+/* The Aspeed AST2500 allows to dynamically route the inputs for the built-in
+ * UARTS and physical serial I/O ports.
+ *
+ * This allows, for example, to connect the output of UART to another UART.
+ * This can be used to enable host<->BMC communication via UARTs, e.g. to allow
+ * access to the host's serial console.
+ *
+ * This driver is for the BMC side. The sysfs files allow the BMC userspace
+ * which owns the system configuration policy, to configure how UARTs and
+ * physical serial I/O ports are routed.
+ */
+
+#define ASPEED_HICRA_IO1	"io1"
+#define ASPEED_HICRA_IO2	"io2"
+#define ASPEED_HICRA_IO3	"io3"
+#define ASPEED_HICRA_IO4	"io4"
+#define ASPEED_HICRA_IO5	"io5"
+#define ASPEED_HICRA_IO6	"io6"
+#define ASPEED_HICRA_UART1	"uart1"
+#define ASPEED_HICRA_UART2	"uart2"
+#define ASPEED_HICRA_UART3	"uart3"
+#define ASPEED_HICRA_UART4	"uart4"
+#define ASPEED_HICRA_UART5	"uart5"
+
+struct aspeed_uart_routing {
+	struct device		*dev;
+	void __iomem		*regs;
+	spinlock_t		lock;
+};
+
+struct aspeed_uart_routing_selector {
+	struct device_attribute	dev_attr;
+	int				shift;
+	int				mask;
+	const char * const options[];
+};
+
+#define to_routing_selector(_dev_attr)					\
+	container_of(_dev_attr, struct aspeed_uart_routing_selector, dev_attr)
+
+
+static ssize_t aspeed_uart_routing_show(struct device *dev,
+					struct device_attribute *attr,
+					char *buf);
+
+static ssize_t aspeed_uart_routing_store(struct device *dev,
+					 struct device_attribute *attr,
+					 const char *buf, size_t count);
+
+#define ROUTING_ATTR(_name) {						\
+	.attr = {.name = _name,					\
+		 .mode = VERIFY_OCTAL_PERMISSIONS(0644) },		\
+	.show = aspeed_uart_routing_show,				\
+	.store = aspeed_uart_routing_store,				\
+}
+
+static struct aspeed_uart_routing_selector uart5_sel = {
+	.dev_attr = ROUTING_ATTR(ASPEED_HICRA_UART5),
+	.shift = 28,
+	.mask = 0xf,
+	.options = {
+		    ASPEED_HICRA_IO5,   // 0
+		    ASPEED_HICRA_IO1,   // 1
+		    ASPEED_HICRA_IO2,   // 2
+		    ASPEED_HICRA_IO3,   // 3
+		    ASPEED_HICRA_IO4,   // 4
+		    ASPEED_HICRA_UART1, // 5
+		    ASPEED_HICRA_UART2, // 6
+		    ASPEED_HICRA_UART3, // 7
+		    ASPEED_HICRA_UART4, // 8
+		    ASPEED_HICRA_IO6,   // 9
+		    NULL,               // NULL termination
+		    },
+};
+
+static struct aspeed_uart_routing_selector uart4_sel = {
+	.dev_attr = ROUTING_ATTR(ASPEED_HICRA_UART4),
+	.shift = 25,
+	.mask = 0x7,
+	.options = {
+		    ASPEED_HICRA_IO4,   // 0
+		    ASPEED_HICRA_IO1,   // 1
+		    ASPEED_HICRA_IO2,   // 2
+		    ASPEED_HICRA_IO3,   // 3
+		    ASPEED_HICRA_UART1, // 4
+		    ASPEED_HICRA_UART2, // 5
+		    ASPEED_HICRA_UART3, // 6
+		    ASPEED_HICRA_IO6,   // 7
+		    NULL,               // NULL termination
+	},
+};
+
+static struct aspeed_uart_routing_selector uart3_sel = {
+	.dev_attr = ROUTING_ATTR(ASPEED_HICRA_UART3),
+	.shift = 22,
+	.mask = 0x7,
+	.options = {
+		    ASPEED_HICRA_IO3,   // 0
+		    ASPEED_HICRA_IO4,   // 1
+		    ASPEED_HICRA_IO1,   // 2
+		    ASPEED_HICRA_IO2,   // 3
+		    ASPEED_HICRA_UART4, // 4
+		    ASPEED_HICRA_UART1, // 5
+		    ASPEED_HICRA_UART2, // 6
+		    ASPEED_HICRA_IO6,   // 7
+		    NULL,               // NULL termination
+		    },
+};
+
+static struct aspeed_uart_routing_selector uart2_sel = {
+	.dev_attr = ROUTING_ATTR(ASPEED_HICRA_UART2),
+	.shift = 19,
+	.mask = 0x7,
+	.options = {
+		    ASPEED_HICRA_IO2,   // 0
+		    ASPEED_HICRA_IO3,   // 1
+		    ASPEED_HICRA_IO4,   // 2
+		    ASPEED_HICRA_IO1,   // 3
+		    ASPEED_HICRA_UART3, // 4
+		    ASPEED_HICRA_UART4, // 5
+		    ASPEED_HICRA_UART1, // 6
+		    ASPEED_HICRA_IO6,   // 7
+		    NULL,               // NULL termination
+		    },
+};
+
+static struct aspeed_uart_routing_selector uart1_sel = {
+	.dev_attr = ROUTING_ATTR(ASPEED_HICRA_UART1),
+	.shift = 16,
+	.mask = 0x7,
+	.options = {
+		    ASPEED_HICRA_IO1,   // 0
+		    ASPEED_HICRA_IO2,   // 1
+		    ASPEED_HICRA_IO3,   // 2
+		    ASPEED_HICRA_IO4,   // 3
+		    ASPEED_HICRA_UART2, // 4
+		    ASPEED_HICRA_UART3, // 5
+		    ASPEED_HICRA_UART4, // 6
+		    ASPEED_HICRA_IO6,   // 7
+		    NULL,               // NULL termination
+		    },
+};
+
+static struct aspeed_uart_routing_selector io5_sel = {
+	.dev_attr = ROUTING_ATTR(ASPEED_HICRA_IO5),
+	.shift = 12,
+	.mask = 0x7,
+	.options = {
+		    ASPEED_HICRA_UART5, // 0
+		    ASPEED_HICRA_UART1, // 1
+		    ASPEED_HICRA_UART2, // 2
+		    ASPEED_HICRA_UART3, // 3
+		    ASPEED_HICRA_UART4, // 4
+		    ASPEED_HICRA_IO1,   // 5
+		    ASPEED_HICRA_IO3,   // 6
+		    ASPEED_HICRA_IO6,   // 7
+		    NULL,               // NULL termination
+		    },
+};
+
+static struct aspeed_uart_routing_selector io4_sel = {
+	.dev_attr = ROUTING_ATTR(ASPEED_HICRA_IO4),
+	.shift = 9,
+	.mask = 0x7,
+	.options = {
+		    ASPEED_HICRA_UART4, // 0
+		    ASPEED_HICRA_UART5, // 1
+		    ASPEED_HICRA_UART1, // 2
+		    ASPEED_HICRA_UART2, // 3
+		    ASPEED_HICRA_UART3, // 4
+		    ASPEED_HICRA_IO1,   // 5
+		    ASPEED_HICRA_IO2,   // 6
+		    ASPEED_HICRA_IO6,   // 7
+		    NULL,               // NULL termination
+		    },
+};
+
+static struct aspeed_uart_routing_selector io3_sel = {
+	.dev_attr = ROUTING_ATTR(ASPEED_HICRA_IO3),
+	.shift = 6,
+	.mask = 0x7,
+	.options = {
+		    ASPEED_HICRA_UART3, // 0
+		    ASPEED_HICRA_UART4, // 1
+		    ASPEED_HICRA_UART5, // 2
+		    ASPEED_HICRA_UART1, // 3
+		    ASPEED_HICRA_UART2, // 4
+		    ASPEED_HICRA_IO1,   // 5
+		    ASPEED_HICRA_IO2,   // 6
+		    ASPEED_HICRA_IO6,   // 7
+		    NULL,               // NULL termination
+		    },
+};
+
+static struct aspeed_uart_routing_selector io2_sel = {
+	.dev_attr = ROUTING_ATTR(ASPEED_HICRA_IO2),
+	.shift = 3,
+	.mask = 0x7,
+	.options = {
+		    ASPEED_HICRA_UART2, // 0
+		    ASPEED_HICRA_UART3, // 1
+		    ASPEED_HICRA_UART4, // 2
+		    ASPEED_HICRA_UART5, // 3
+		    ASPEED_HICRA_UART1, // 4
+		    ASPEED_HICRA_IO3,   // 5
+		    ASPEED_HICRA_IO4,   // 6
+		    ASPEED_HICRA_IO6,   // 7
+		    NULL,               // NULL termination
+		    },
+};
+
+static struct aspeed_uart_routing_selector io1_sel = {
+	.dev_attr = ROUTING_ATTR(ASPEED_HICRA_IO1),
+	.shift = 0,
+	.mask = 0x7,
+	.options = {
+		    ASPEED_HICRA_UART1, // 0
+		    ASPEED_HICRA_UART2, // 1
+		    ASPEED_HICRA_UART3, // 2
+		    ASPEED_HICRA_UART4, // 3
+		    ASPEED_HICRA_UART5, // 4
+		    ASPEED_HICRA_IO3,   // 5
+		    ASPEED_HICRA_IO4,   // 6
+		    ASPEED_HICRA_IO6,   // 7
+		    NULL,               // NULL termination
+		    },
+};
+
+
+static struct attribute *aspeed_uart_routing_attrs[] = {
+	&uart1_sel.dev_attr.attr,
+	&uart2_sel.dev_attr.attr,
+	&uart3_sel.dev_attr.attr,
+	&uart4_sel.dev_attr.attr,
+	&uart5_sel.dev_attr.attr,
+	&io1_sel.dev_attr.attr,
+	&io2_sel.dev_attr.attr,
+	&io3_sel.dev_attr.attr,
+	&io4_sel.dev_attr.attr,
+	&io5_sel.dev_attr.attr,
+	NULL,
+};
+
+static const struct attribute_group aspeed_uart_routing_attr_group = {
+	.attrs = aspeed_uart_routing_attrs,
+};
+
+static ssize_t aspeed_uart_routing_show(struct device *dev,
+					struct device_attribute *attr,
+					char *buf)
+{
+	struct aspeed_uart_routing *uart_routing = dev_get_drvdata(dev);
+	struct aspeed_uart_routing_selector *sel = to_routing_selector(attr);
+	int val, pos, len;
+
+	val = (readl(uart_routing->regs) >> sel->shift) & sel->mask;
+
+	len = 0;
+	for (pos = 0; sel->options[pos] != NULL; ++pos) {
+		if (pos == val) {
+			len += snprintf(buf + len, PAGE_SIZE - 1 - len,
+					"[%s] ", sel->options[pos]);
+		} else {
+			len += snprintf(buf + len, PAGE_SIZE - 1 - len,
+					"%s ", sel->options[pos]);
+		}
+	}
+
+	if (val >= pos) {
+		len += snprintf(buf + len, PAGE_SIZE - 1 - len,
+				"[unknown(%d)]", val);
+	}
+
+	len += snprintf(buf + len, PAGE_SIZE - 1 - len, "\n");
+
+	return len;
+}
+
+static ssize_t aspeed_uart_routing_store(struct device *dev,
+					 struct device_attribute *attr,
+					 const char *buf, size_t count)
+{
+	struct aspeed_uart_routing *uart_routing = dev_get_drvdata(dev);
+	struct aspeed_uart_routing_selector *sel = to_routing_selector(attr);
+	int val;
+	u32 reg;
+
+	val = match_string(sel->options, -1, buf);
+	if (val < 0) {
+		dev_err(dev, "invalid value \"%s\"\n", buf);
+		return -EINVAL;
+	}
+
+	spin_lock(&uart_routing->lock);
+	reg = readl(uart_routing->regs);
+	// Zero out existing value in specified bits.
+	reg &= ~(sel->mask << sel->shift);
+	// Set new value in specified bits.
+	reg |= (val & sel->mask) << sel->shift;
+	writel(reg, uart_routing->regs);
+	spin_unlock(&uart_routing->lock);
+
+	return count;
+}
+
+static int aspeed_uart_routing_probe(struct platform_device *pdev)
+{
+	struct aspeed_uart_routing *uart_routing;
+	struct resource *res;
+	int rc;
+
+	uart_routing = devm_kzalloc(&pdev->dev,
+				    sizeof(*uart_routing),
+				    GFP_KERNEL);
+	if (!uart_routing)
+		return -ENOMEM;
+
+	spin_lock_init(&uart_routing->lock);
+	uart_routing->dev = &pdev->dev;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	uart_routing->regs = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(uart_routing->regs))
+		return PTR_ERR(uart_routing->regs);
+
+	rc = sysfs_create_group(&uart_routing->dev->kobj,
+				&aspeed_uart_routing_attr_group);
+	if (rc < 0)
+		return rc;
+
+	platform_set_drvdata(pdev, uart_routing);
+
+	return 0;
+}
+
+static int aspeed_uart_routing_remove(struct platform_device *pdev)
+{
+	struct aspeed_uart_routing *uart_routing = platform_get_drvdata(pdev);
+
+	sysfs_remove_group(&uart_routing->dev->kobj,
+			   &aspeed_uart_routing_attr_group);
+
+	return 0;
+}
+
+static const struct of_device_id aspeed_uart_routing_table[] = {
+	{ .compatible = "aspeed,ast2500-uart-routing" },
+	{ },
+};
+
+static struct platform_driver aspeed_uart_routing_driver = {
+	.driver = {
+		.name = "aspeed-uart-routing",
+		.of_match_table = aspeed_uart_routing_table,
+	},
+	.probe = aspeed_uart_routing_probe,
+	.remove = aspeed_uart_routing_remove,
+};
+
+module_platform_driver(aspeed_uart_routing_driver);
+
+MODULE_AUTHOR("Oskar Senft <osk@google.com>");
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Driver to configure Aspeed UART routing");
-- 
2.19.0.rc1.350.ge57e33dbd1-goog

[PATCH 2/2] arch: arm: boot: dts: aspeed: Add UART routing driver to Aspeed G5 DTS.

[Oskar Senft]

Signed-off-by: Oskar Senft <osk@google.com>
---
 .../bindings/misc/aspeed,uart-routing.txt     | 22 +++++++++++++++++++
 arch/arm/boot/dts/aspeed-g5.dtsi              |  6 +++++
 2 files changed, 28 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/misc/aspeed,uart-routing.txt

diff --git a/Documentation/devicetree/bindings/misc/aspeed,uart-routing.txt b/Documentation/devicetree/bindings/misc/aspeed,uart-routing.txt
new file mode 100644
index 000000000000..d0a93173593c
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/aspeed,uart-routing.txt
@@ -0,0 +1,22 @@
+* ASPEED AST2500 UART routing
+
+This file describes the bindings for the UART routing selector present
+in the AST2500 BMC SoC.
+
+The Aspeed AST2500 allows to dynamically route the inputs for the built-in
+UARTS and physical serial I/O ports.
+
+This allows, for example, to connect the output of UART to another UART.
+This can be used to enable host<->BMC communication via UARTs, e.g. to allow
+access to the host's serial console.
+
+Required properties:
+- reg: address and length of the register for the device.
+- compatible: "aspeed,ast2500-cvic"
+
+Example:
+
+	uart_routing: uart_routing at 1e78909c {
+		compatible = "aspeed,ast2500-uart-routing";
+		reg = <0x1e78909c 0x4>;
+	};
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 87fdc146ff52..03094e8878eb 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -375,6 +375,12 @@
 						status = "disabled";
 					};
 				};
+
+				uart_routing: uart_routing at 9c {
+					compatible = "aspeed,ast2500-uart-routing";
+					reg = <0x9c 0x4>;
+					status = "disabled";
+				};
 			};
 
 			uart2: serial at 1e78d000 {
-- 
2.19.0.rc1.350.ge57e33dbd1-goog

[PATCH 1/2] misc: aspeed: Add Aspeed UART routing control driver.

[Linus Walleij]

On Tue, Sep 4, 2018 at 10:20 PM Oskar Senft <osk@google.com> wrote:

> This driver adds sysfs files that allow the BMC userspace to configure
> how UARTs and physical serial I/O ports are routed.
>
> Tested: Checked correct behavior (both read & write) on TYAN S7106
> board by manually changing routing settings and confirming that bits
> flow as expected. Tested for UART1 and UART3 as this board doesn't have
> the other UARTs wired up in a testable way.
>
> Signed-off-by: Oskar Senft <osk@google.com>

After reading some other messages about this I realize it's not very
much you can do with the standard frameworks and you definately
need something like this. Not like I have any better idea.

Arnd and Greg are misc maintainers so not you will need to
talk to them.

I would opt to put it in drivers/soc/aspeed though.

Yours,
Linus Walleij

[PATCH 1/2] misc: aspeed: Add Aspeed UART routing control driver.

[Andrew Jeffery]

On Wed, 5 Sep 2018, at 07:25, Linus Walleij wrote:
> On Tue, Sep 4, 2018 at 10:20 PM Oskar Senft <osk@google.com> wrote:
> 
> > This driver adds sysfs files that allow the BMC userspace to configure
> > how UARTs and physical serial I/O ports are routed.
> >
> > Tested: Checked correct behavior (both read & write) on TYAN S7106
> > board by manually changing routing settings and confirming that bits
> > flow as expected. Tested for UART1 and UART3 as this board doesn't have
> > the other UARTs wired up in a testable way.
> >
> > Signed-off-by: Oskar Senft <osk@google.com>
> 
> After reading some other messages about this I realize it's not very
> much you can do with the standard frameworks and you definately
> need something like this. Not like I have any better idea.
> 
> Arnd and Greg are misc maintainers so not you will need to
> talk to them.

Yes. I'm certainly not a person that can merge them. 

Oskar: Please add at least Greg and Arnd as Linus suggests, and in the future make use of ./scripts/get_maintainer.pl to identify people and lists who should receive the patches.

> 
> I would opt to put it in drivers/soc/aspeed though.

Yep, drivers/soc/aspeed seems like a better place. There are other drivers in misc likely should be moved there as well.

Thanks for your feedback Linus.

Andrew

[PATCH 1/2] misc: aspeed: Add Aspeed UART routing control driver.

[Oskar Senft]

Thanks for the input!

I had a look at get_maintainer.pl, but thought I'd send it to you and Linus
first to get initial input since we had already talked about it.

I'll move it to drivers/soc/aspeed and will resend.

For clarification: Should I send to ALL of the people and lists that
get_maintainer.pl spits out?

Thanks
Oskar.

On Tue, Sep 4, 2018 at 8:15 PM Andrew Jeffery <andrew@aj.id.au> wrote:

> On Wed, 5 Sep 2018, at 07:25, Linus Walleij wrote:
> > On Tue, Sep 4, 2018 at 10:20 PM Oskar Senft <osk@google.com> wrote:
> >
> > > This driver adds sysfs files that allow the BMC userspace to configure
> > > how UARTs and physical serial I/O ports are routed.
> > >
> > > Tested: Checked correct behavior (both read & write) on TYAN S7106
> > > board by manually changing routing settings and confirming that bits
> > > flow as expected. Tested for UART1 and UART3 as this board doesn't have
> > > the other UARTs wired up in a testable way.
> > >
> > > Signed-off-by: Oskar Senft <osk@google.com>
> >
> > After reading some other messages about this I realize it's not very
> > much you can do with the standard frameworks and you definately
> > need something like this. Not like I have any better idea.
> >
> > Arnd and Greg are misc maintainers so not you will need to
> > talk to them.
>
> Yes. I'm certainly not a person that can merge them.
>
> Oskar: Please add at least Greg and Arnd as Linus suggests, and in the
> future make use of ./scripts/get_maintainer.pl to identify people and
> lists who should receive the patches.
>
> >
> > I would opt to put it in drivers/soc/aspeed though.
>
> Yep, drivers/soc/aspeed seems like a better place. There are other drivers
> in misc likely should be moved there as well.
>
> Thanks for your feedback Linus.
>
> Andrew
>
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[PATCH 1/2] misc: aspeed: Add Aspeed UART routing control driver.

[Linus Walleij]

On Wed, Sep 5, 2018 at 2:19 AM Oskar Senft <osk@google.com> wrote:

> For clarification: Should I send to ALL of the people and lists that get_maintainer.pl spits out?

It's more like a suggestion. Definately the names coming from
MAINTAINERS, the rest is "good to have". If it becomes too many
just strip some off randomly, or look who changed the file(s) most
recently.

Yours,
Linus Walleij

[PATCH 1/2] misc: aspeed: Add Aspeed UART routing control driver.

[Oskar Senft]

I just had a look at the upstream kernel - there's no drivers/soc/aspeed. I
did find drivers/soc, but no subdirectory for aspeed. Should I create that
with my commit?

Oskar.

On Tue, Sep 4, 2018 at 8:19 PM Oskar Senft <osk@google.com> wrote:

> Thanks for the input!
>
> I had a look at get_maintainer.pl, but thought I'd send it to you and
> Linus first to get initial input since we had already talked about it.
>
> I'll move it to drivers/soc/aspeed and will resend.
>
> For clarification: Should I send to ALL of the people and lists that
> get_maintainer.pl spits out?
>
> Thanks
> Oskar.
>
> On Tue, Sep 4, 2018 at 8:15 PM Andrew Jeffery <andrew@aj.id.au> wrote:
>
>> On Wed, 5 Sep 2018, at 07:25, Linus Walleij wrote:
>> > On Tue, Sep 4, 2018 at 10:20 PM Oskar Senft <osk@google.com> wrote:
>> >
>> > > This driver adds sysfs files that allow the BMC userspace to configure
>> > > how UARTs and physical serial I/O ports are routed.
>> > >
>> > > Tested: Checked correct behavior (both read & write) on TYAN S7106
>> > > board by manually changing routing settings and confirming that bits
>> > > flow as expected. Tested for UART1 and UART3 as this board doesn't
>> have
>> > > the other UARTs wired up in a testable way.
>> > >
>> > > Signed-off-by: Oskar Senft <osk@google.com>
>> >
>> > After reading some other messages about this I realize it's not very
>> > much you can do with the standard frameworks and you definately
>> > need something like this. Not like I have any better idea.
>> >
>> > Arnd and Greg are misc maintainers so not you will need to
>> > talk to them.
>>
>> Yes. I'm certainly not a person that can merge them.
>>
>> Oskar: Please add at least Greg and Arnd as Linus suggests, and in the
>> future make use of ./scripts/get_maintainer.pl to identify people and
>> lists who should receive the patches.
>>
>> >
>> > I would opt to put it in drivers/soc/aspeed though.
>>
>> Yep, drivers/soc/aspeed seems like a better place. There are other
>> drivers in misc likely should be moved there as well.
>>
>> Thanks for your feedback Linus.
>>
>> Andrew
>>
>
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[PATCH 1/2] misc: aspeed: Add Aspeed UART routing control driver.

[Linus Walleij]

On Wed, Sep 5, 2018 at 3:45 PM Oskar Senft <osk@google.com> wrote:

> I just had a look at the upstream kernel - there's no drivers/soc/aspeed.
> I did find drivers/soc, but no subdirectory for aspeed. Should I create
> that with my commit?

Yeah just do it, someone has to be the first.

Yours,
Linus Walleij