From mboxrd@z Thu Jan 1 00:00:00 1970 From: Matthew Barth Date: Tue, 25 Feb 2020 14:14:15 -0600 Subject: [PATCH v2] ARM: dts: rainier: Set PCA9552 pin types Message-ID: <20200225201415.431668-1-msbarth@linux.ibm.com> List-Id: To: linux-aspeed@lists.ozlabs.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type GPIO. Signed-off-by: Matthew Barth --- v2: Added leds-pca955x.h include Added upstream to patch --- --- arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts index c63cefce636d..d9fa9fd48058 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts @@ -4,6 +4,7 @@ #include "aspeed-g6.dtsi" #include +#include / { model = "Rainier"; @@ -351,66 +352,82 @@ gpio at 0 { reg = <0>; + type = ; }; gpio at 1 { reg = <1>; + type = ; }; gpio at 2 { reg = <2>; + type = ; }; gpio at 3 { reg = <3>; + type = ; }; gpio at 4 { reg = <4>; + type = ; }; gpio at 5 { reg = <5>; + type = ; }; gpio at 6 { reg = <6>; + type = ; }; gpio at 7 { reg = <7>; + type = ; }; gpio at 8 { reg = <8>; + type = ; }; gpio at 9 { reg = <9>; + type = ; }; gpio at 10 { reg = <10>; + type = ; }; gpio at 11 { reg = <11>; + type = ; }; gpio at 12 { reg = <12>; + type = ; }; gpio at 13 { reg = <13>; + type = ; }; gpio at 14 { reg = <14>; + type = ; }; gpio at 15 { reg = <15>; + type = ; }; }; -- 2.24.1