From: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
To: linux-aspeed@lists.ozlabs.org
Subject: [PATCH 3/4] ARM: dts: aspeed: ast2600-evb: Adjust SPI flash configuration
Date: Mon, 2 Nov 2020 15:52:12 +0800 [thread overview]
Message-ID: <20201102075213.32404-4-chin-ting_kuo@aspeedtech.com> (raw)
In-Reply-To: <20201102075213.32404-1-chin-ting_kuo@aspeedtech.com>
- Enable FMC CS1 and SPI2 CS0 SPI NOR flashes since both of
these two flashes are mounted on AST2600 EVB by default.
- Remove spi-max-frequency setting: 50MHz is usual SPI bus
frequency adopted on AST2600 EVB which has already been
configured in aspeed-g6.dtsi.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
---
arch/arm/boot/dts/aspeed-ast2600-evb.dts | 26 ++++++++++++++++++++----
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
index 8d0f4656aa05..5a2e4612d155 100644
--- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
@@ -96,12 +96,11 @@
&fmc {
status = "okay";
+
flash at 0 {
status = "okay";
m25p,fast-read;
label = "bmc";
- spi-max-frequency = <50000000>;
-
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
@@ -133,18 +132,37 @@
};
};
};
+
+ flash at 1 {
+ status = "okay";
+ m25p,fast-read;
+ label = "fmc0:1";
+ };
};
&spi1 {
status = "okay";
+
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash at 0 {
status = "okay";
m25p,fast-read;
- label = "pnor";
- spi-max-frequency = <100000000>;
+ label = "spi1:0";
+ };
+};
+
+&spi2 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi2_default>;
+
+ flash at 0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "spi2:0";
};
};
--
2.17.1
next prev parent reply other threads:[~2020-11-02 7:52 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-02 7:52 [PATCH 0/4] Porting ASPEED FMC/SPI memory controller driver Chin-Ting Kuo
2020-11-02 7:52 ` [PATCH 1/4] dt-bindings: spi: Add binding file for ASPEED FMC/SPI memory controller Chin-Ting Kuo
2020-11-02 7:52 ` [PATCH 2/4] ARM: dts: aspeed: ast2600: Update FMC/SPI controller setting for spi-aspeed.c Chin-Ting Kuo
2020-11-02 7:52 ` Chin-Ting Kuo [this message]
2020-11-02 7:52 ` [PATCH 4/4] spi: aspeed: Add ASPEED FMC/SPI memory controller driver Chin-Ting Kuo
2020-11-03 0:33 ` kernel test robot
2020-11-03 0:33 ` [RFC PATCH] spi: aspeed: aspeed_spi_get_io_mode() can be static kernel test robot
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