From: Tommy Haung <tommy_huang@aspeedtech.com>
To: linux-aspeed@lists.ozlabs.org
Subject: [PATCH v6 1/5] ARM: dts: aspeed: Add GFX node to AST2600
Date: Wed, 2 Mar 2022 10:49:26 +0800 [thread overview]
Message-ID: <20220302024930.18758-2-tommy_huang@aspeedtech.com> (raw)
In-Reply-To: <20220302024930.18758-1-tommy_huang@aspeedtech.com>
From: Joel Stanley <joel@jms.id.au>
The GFX device is present in the AST2600 SoC.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com>
---
arch/arm/boot/dts/aspeed-g6.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 1b47be1704f8..e38c3742761b 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -351,6 +351,17 @@
quality = <100>;
};
+ gfx: display at 1e6e6000 {
+ compatible = "aspeed,ast2600-gfx", "aspeed,ast2500-gfx", "syscon";
+ reg = <0x1e6e6000 0x1000>;
+ reg-io-width = <4>;
+ clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
+ resets = <&syscon ASPEED_RESET_GRAPHICS>;
+ syscon = <&syscon>;
+ status = "disabled";
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
xdma: xdma at 1e6e7000 {
compatible = "aspeed,ast2600-xdma";
reg = <0x1e6e7000 0x100>;
--
2.17.1
next prev parent reply other threads:[~2022-03-02 2:49 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-02 2:49 [PATCH v6 0/5] Add Aspeed AST2600 soc display support Tommy Haung
2022-03-02 2:49 ` Tommy Haung [this message]
2022-03-02 2:49 ` [PATCH v6 2/5] ARM: dts: aspeed: ast2600-evb: Enable GFX device Tommy Haung
2022-03-02 2:49 ` [PATCH v6 3/5] drm/aspeed: Update INTR_STS handling Tommy Haung
2022-03-02 2:49 ` [PATCH v6 4/5] drm/aspeed: Add AST2600 chip support Tommy Haung
2022-03-02 2:49 ` [PATCH v6 5/5] ARM: dtsi: aspeed: Modified gfx reset control Tommy Haung
2022-03-02 3:08 ` Joel Stanley
2022-03-02 3:09 ` [PATCH v6 0/5] Add Aspeed AST2600 soc display support Joel Stanley
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