From mboxrd@z Thu Jan 1 00:00:00 1970 From: Delphine CC Chiu Date: Mon, 11 Dec 2023 13:47:18 +0800 Subject: [PATCH v3 03/14] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting In-Reply-To: <20231211054730.208588-1-Delphine_CC_Chiu@wiwynn.com> References: <20231211054730.208588-1-Delphine_CC_Chiu@wiwynn.com> Message-ID: <20231211054730.208588-4-Delphine_CC_Chiu@wiwynn.com> List-Id: To: linux-aspeed@lists.ozlabs.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit enable spi-gpio setting for spi flash Signed-off-by: Delphine CC Chiu --- .../aspeed/aspeed-bmc-facebook-yosemite4.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts index c32736fbaf70..0449a7e36ff6 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts @@ -53,6 +53,24 @@ iio-hwmon { <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, <&adc1 0>, <&adc1 1>, <&adc1 7>; }; + + spi_gpio: spi-gpio { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + gpio-sck = <&gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH>; + gpio-mosi = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>; + gpio-miso = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>; + num-chipselects = <1>; + cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>; + + tpmdev at 0 { + compatible = "tcg,tpm_tis-spi"; + spi-max-frequency = <33000000>; + reg = <0>; + }; + }; }; &uart1 { -- 2.25.1