From: Kevin Chen <kevin_chen@aspeedtech.com>
To: <joel@jms.id.au>, <andrew@codeconstruct.com.au>,
<linux-arm-kernel@lists.infradead.org>,
<linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
<elbadrym@google.com>
Cc: Kevin Chen <kevin_chen@aspeedtech.com>
Subject: [PATCH v0 1/3] dt-binding: aspeed: Add LPC PCC controller
Date: Fri, 17 Jan 2025 17:52:15 +0800 [thread overview]
Message-ID: <20250117095217.661070-2-kevin_chen@aspeedtech.com> (raw)
In-Reply-To: <20250117095217.661070-1-kevin_chen@aspeedtech.com>
Add dt-bindings for Aspeed for Aspeed LPC POST code capture controller.
Signed-off-by: Kevin Chen <kevin_chen@aspeedtech.com>
---
.../bindings/soc/aspeed/lpc-pcc.yaml | 51 +++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/aspeed/lpc-pcc.yaml
diff --git a/Documentation/devicetree/bindings/soc/aspeed/lpc-pcc.yaml b/Documentation/devicetree/bindings/soc/aspeed/lpc-pcc.yaml
new file mode 100644
index 000000000000..6c2134497de2
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/aspeed/lpc-pcc.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# # Copyright (c) 2024 Aspeed Technology Inc.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/aspeed/lpc-pcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Aspeed Post Cost Capture Controller
+
+maintainers:
+ - Kevin Chen <kevin_chen@aspeedtech.com>
+ - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
+
+description:
+ The Aspeed PCC control allow to capture POST code from Host.
+
+ This driver is for the BMC side. POST code data can be access by
+ /dev/aspeed-lpc-pcc0. For example, POST code data is below.
+ ~# hexdump /dev/aspeed-lpc-pcc0
+ 0000000 40b3 40a0 40a3 40a2 40a2 40b4 40a5 40ee
+ 0000010 40ee 40ee 40ee 40ee 40ee 40ee 40ee 40ee
+ 0000020 40ee 40ee 40ee 40ee 40ee 40ee 40ee 40a6
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - aspeed,ast2600-lpc-pcc
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ lpc: lpc@1e789000 {
+ compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon";
+ reg = <0x1e789000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e789000 0x1000>;
+
+ lpc_pcc: lpc-pcc@0 {
+ compatible = "aspeed,ast2600-lpc-pcc";
+ reg = <0x0 0x140>;
+ };
+ };
--
2.34.1
next prev parent reply other threads:[~2025-01-17 9:52 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-17 9:52 [PATCH v0 0/3] Add AST2600 LPC PCC support Kevin Chen
2025-01-17 9:52 ` Kevin Chen [this message]
2025-01-18 8:19 ` [PATCH v0 1/3] dt-binding: aspeed: Add LPC PCC controller Krzysztof Kozlowski
2025-02-13 8:46 ` Kevin Chen
2025-02-17 11:55 ` Krzysztof Kozlowski
2025-02-18 11:05 ` Kevin Chen
2025-02-18 11:32 ` Krzysztof Kozlowski
2025-01-17 9:52 ` [PATCH v0 2/3] ARM: dts: aspeed-g6: Add AST2600 LPC PCC support Kevin Chen
2025-01-17 9:52 ` [PATCH v0 3/3] soc: aspeed: lpc-pcc: Add PCC controller support Kevin Chen
2025-01-18 8:24 ` Krzysztof Kozlowski
2025-02-13 8:57 ` Kevin Chen
2025-01-17 14:32 ` [PATCH v0 0/3] Add AST2600 LPC PCC support Rob Herring (Arm)
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