From: Willie Thai <wthai@nvidia.com>
To: <wthai@nvidia.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
"Deepak Kodihalli" <dkodihalli@nvidia.com>,
Ed Tanous <etanous@nvidia.com>, Leo Huang <leohu@nvidia.com>
Subject: [PATCH 1/3] ARM: dts: aspeed: nvidia: gb200nvl: Add VCC Supply
Date: Sun, 25 May 2025 18:20:17 +0000 [thread overview]
Message-ID: <20250525-dts-v1-1-9ac63ad3bf15@nvidia.com> (raw)
In-Reply-To: <20250525-dts-v1-0-9ac63ad3bf15@nvidia.com>
Add Vcc supply to avoid probing the devices before they have power.
Signed-off-by: Deepak Kodihalli <dkodihalli@nvidia.com>
Signed-off-by: Ed Tanous <etanous@nvidia.com>
Signed-off-by: Willie Thai <wthai@nvidia.com>
---
.../dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts | 34 ++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts
index 41e3e9dd85f571254a08d40e68c0d8f8f049256b..0b0abb259ca3a68b43dcfa61df69b8a15421d67c 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts
@@ -126,6 +126,16 @@ button-uid {
gpio = <&sgpiom0 154 GPIO_ACTIVE_LOW>;
};
};
+
+ standby_power_regulator: standby-power-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "standby_power";
+ gpio = <&gpio0 ASPEED_GPIO(M, 3) GPIO_ACTIVE_HIGH>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ enable-active-high;
+ regulator-always-on;
+ };
};
// Enable Primary flash on FMC for bring up activity
@@ -420,6 +430,7 @@ &i2c3 {
&i2c4 {
status = "okay";
clock-frequency = <400000>;
+ vcc-supply = <&standby_power_regulator>;
// Module 0, Expander @0x21
exp4: gpio@21 {
@@ -431,6 +442,7 @@ exp4: gpio@21 {
#interrupt-cells = <2>;
interrupt-parent = <&gpio1>;
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
+ vcc-supply = <&standby_power_regulator>;
gpio-line-names =
"RTC_MUX_SEL-O",
"PCI_MUX_SEL-O",
@@ -457,6 +469,7 @@ &i2c5 {
status = "okay";
clock-frequency = <400000>;
multi-master;
+ vcc-supply = <&standby_power_regulator>;
i2c-mux@71 {
compatible = "nxp,pca9546";
@@ -464,6 +477,7 @@ i2c-mux@71 {
#size-cells = <0>;
reg = <0x71>;
i2c-mux-idle-disconnect;
+ vdd-supply = <&standby_power_regulator>;
imux16: i2c@0 {
#address-cells = <1>;
@@ -482,6 +496,7 @@ i2c-mux@74 {
#size-cells = <0>;
reg = <0x74>;
i2c-mux-idle-disconnect;
+ vcc-supply = <&standby_power_regulator>;
i2c17mux0: i2c@0 {
#address-cells = <1>;
@@ -528,6 +543,7 @@ i2c-mux@72 {
#size-cells = <0>;
reg = <0x72>;
i2c-mux-idle-disconnect;
+ vdd-supply = <&standby_power_regulator>;
imux20: i2c@0 {
#address-cells = <1>;
@@ -545,6 +561,7 @@ gpio@21 {
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
+ vcc-supply = <&standby_power_regulator>;
gpio-line-names =
"RST_CX_0_L-O",
"RST_CX_1_L-O",
@@ -584,6 +601,7 @@ i2c-mux@73 {
#size-cells = <0>;
reg = <0x73>;
i2c-mux-idle-disconnect;
+ vdd-supply = <&standby_power_regulator>;
imux24: i2c@0 {
#address-cells = <1>;
@@ -602,6 +620,7 @@ i2c-mux@70 {
#size-cells = <0>;
reg = <0x70>;
i2c-mux-idle-disconnect;
+ vdd-supply = <&standby_power_regulator>;
i2c25mux0: i2c@0 {
#address-cells = <1>;
@@ -648,6 +667,7 @@ i2c-mux@75 {
#size-cells = <0>;
reg = <0x75>;
i2c-mux-idle-disconnect;
+ vdd-supply = <&standby_power_regulator>;
imux28: i2c@0 {
#address-cells = <1>;
@@ -666,6 +686,7 @@ i2c-mux@74 {
#size-cells = <0>;
reg = <0x74>;
i2c-mux-idle-disconnect;
+ vcc-supply = <&standby_power_regulator>;
i2c29mux0: i2c@0 {
#address-cells = <1>;
@@ -712,6 +733,7 @@ i2c-mux@76 {
#size-cells = <0>;
reg = <0x76>;
i2c-mux-idle-disconnect;
+ vdd-supply = <&standby_power_regulator>;
imux32: i2c@0 {
#address-cells = <1>;
@@ -729,6 +751,7 @@ gpio@21 {
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
+ vcc-supply = <&standby_power_regulator>;
gpio-line-names =
"SEC_RST_CX_0_L-O",
"SEC_RST_CX_1_L-O",
@@ -768,6 +791,7 @@ i2c-mux@77 {
#size-cells = <0>;
reg = <0x77>;
i2c-mux-idle-disconnect;
+ vdd-supply = <&standby_power_regulator>;
imux36: i2c@0 {
#address-cells = <1>;
@@ -801,6 +825,7 @@ imux39: i2c@3 {
&i2c6 {
status = "okay";
clock-frequency = <400000>;
+ vcc-supply = <&standby_power_regulator>;
pmic@12 {
compatible = "ti,lm5066i";
@@ -843,6 +868,7 @@ &i2c8 {
status = "okay";
clock-frequency = <400000>;
multi-master;
+ vcc-supply = <&standby_power_regulator>;
};
// I2C10
@@ -851,6 +877,7 @@ &i2c8 {
&i2c9 {
status = "okay";
clock-frequency = <400000>;
+ vcc-supply = <&standby_power_regulator>;
// Module 0, Expander @0x20
exp0: gpio@20 {
@@ -862,6 +889,7 @@ exp0: gpio@20 {
#interrupt-cells = <2>;
interrupt-parent = <&gpio1>;
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
+ vcc-supply = <&standby_power_regulator>;
gpio-line-names =
"FPGA_THERM_OVERT_L-I",
"FPGA_READY_BMC-I",
@@ -891,6 +919,7 @@ exp1: gpio@21 {
#interrupt-cells = <2>;
interrupt-parent = <&gpio1>;
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
+ vcc-supply = <&standby_power_regulator>;
gpio-line-names =
"SEC_FPGA_THERM_OVERT_L-I",
"SEC_FPGA_READY_BMC-I",
@@ -949,6 +978,7 @@ exp3: gpio@74 {
#interrupt-cells = <2>;
interrupt-parent = <&gpio1>;
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
+ vcc-supply = <&standby_power_regulator>;
gpio-line-names =
"IOB_PRSNT_L",
"IOB_DP_HPD",
@@ -1006,6 +1036,7 @@ &i2c14 {
status = "okay";
clock-frequency = <100000>;
multi-master;
+ vcc-supply = <&standby_power_regulator>;
//E1.S drive slot 0-3
i2c-mux@77 {
@@ -1014,6 +1045,7 @@ i2c-mux@77 {
#size-cells = <0>;
reg = <0x77>;
i2c-mux-idle-disconnect;
+ vdd-supply = <&standby_power_regulator>;
e1si2c0: i2c@0 {
#address-cells = <1>;
@@ -1046,6 +1078,7 @@ &i2c15 {
status = "okay";
clock-frequency = <100000>;
multi-master;
+ vcc-supply = <&standby_power_regulator>;
//E1.S drive slot 4-7
i2c-mux@77 {
@@ -1054,6 +1087,7 @@ i2c-mux@77 {
#size-cells = <0>;
reg = <0x77>;
i2c-mux-idle-disconnect;
+ vdd-supply = <&standby_power_regulator>;
e1si2c4: i2c@0 {
#address-cells = <1>;
--
2.25.1
next prev parent reply other threads:[~2025-05-25 23:21 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-25 18:20 [PATCH 0/3] ARM: dts: aspeed: nvidia: Update DTS to support GB200NVL hardware Willie Thai
2025-05-25 18:20 ` Willie Thai [this message]
2025-05-25 18:20 ` [PATCH 2/3] ARM: dts: aspeed: nvidia: gb200nvl: Enable i2c3 bus Willie Thai
2025-05-25 18:20 ` [PATCH 3/3] ARM: dts: aspeed: nvidia: gb200nvl: Repurpose the HMC gpio pin Willie Thai
2025-05-27 17:56 ` [PATCH 0/3] ARM: dts: aspeed: nvidia: Update DTS to support GB200NVL hardware Rob Herring (Arm)
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