From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B8B0ECA0FFD for ; Mon, 1 Sep 2025 06:01:50 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [127.0.0.1]) by lists.ozlabs.org (Postfix) with ESMTP id 4cFdW46sQpz30Lt; Mon, 1 Sep 2025 15:59:44 +1000 (AEST) Authentication-Results: lists.ozlabs.org; arc=none smtp.remote-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1756706384; cv=none; b=a/AkMsMOC3zvJ+NznX2r9vcm1N29M5WW2Z81ylI/zSu8QyWxvRE6GkRpjK72NNzuQHc2xq09v8ZDGB3+yDn+vkritF8QiR8qA23cnLhsAb+hlxUUaf7CpqzXSC73CooHL2Umi4L1Ms9kkfE8jhHOL3sSyqyOgw69SNRtbhBdDNinrTg3D3Wi1c5MIBNeeLrn8GIlgTYYnI9XbIOyIMDPNmoiqVVq1wFIqWiaBlx1Jx+V2bgk5ZyAfRLbMf/6w63Qud+Hl+aOZz79Il5c/wgdjG970e2S49LKx6cVf0PnOhoxNNF3yKmaUOKiI3O4j1kKzdvSL8tFSiu3yiogt7HhrA== ARC-Message-Signature: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1756706384; c=relaxed/relaxed; bh=KEHxIRg5KoyOMUOBjzoPYO8CD82MLQnA7sccq0XwXJ4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=f/cFCRp679oYIziueP1tTC9CX60dG6xJXHBqQcsuqJOTrF1nfHpXvA6yWTp252OE8yB+WloWIVidS1l0q7pz1tC5UxVUtFh+Zb3kM9Pd8JYVzaffMIpLXBf8s9wMf5J+6huLgawuInjzfm5AH8F2GUd7MpPAqnInoHcDcjs2O50m9O65CzKkxN4i7YGD75fQeRkkPtFd3KbEaSr9Maq3xL7KTjRm0CL1a8ySObL0dD2Ox9ZkCXY0mwn3hLI10lnbrfwxc58yu2WiaSZq4ulLFeFbWaOSwa6A4cpVkAKe4fr+tyHt2K6CiCUl8XVNMuAsPvwOIHGqiRItRy7ceWeL4g== ARC-Authentication-Results: i=1; lists.ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass (client-ip=211.20.114.72; helo=twmbx01.aspeed.com; envelope-from=jacky_chou@aspeedtech.com; receiver=lists.ozlabs.org) smtp.mailfrom=aspeedtech.com Authentication-Results: lists.ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=aspeedtech.com (client-ip=211.20.114.72; helo=twmbx01.aspeed.com; envelope-from=jacky_chou@aspeedtech.com; receiver=lists.ozlabs.org) Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4cFdW42FnFz30FR; Mon, 1 Sep 2025 15:59:44 +1000 (AEST) Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 1 Sep 2025 13:59:23 +0800 Received: from mail.aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 1 Sep 2025 13:59:23 +0800 From: Jacky Chou To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v3 08/10] PCI: Add FMT and TYPE definition for TLP header Date: Mon, 1 Sep 2025 13:59:20 +0800 Message-ID: <20250901055922.1553550-9-jacky_chou@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250901055922.1553550-1-jacky_chou@aspeedtech.com> References: <20250901055922.1553550-1-jacky_chou@aspeedtech.com> X-Mailing-List: linux-aspeed@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain According to PCIe specification, add FMT and TYPE definition for TLP header. Signed-off-by: Jacky Chou --- drivers/pci/pci.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 34f65d69662e..45d47d6c4f53 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -81,6 +81,18 @@ struct pcie_tlp_log; #define PCIE_MSG_CODE_DEASSERT_INTC 0x26 #define PCIE_MSG_CODE_DEASSERT_INTD 0x27 +/* Format of TLP; PCIe r5.0, sec 2.2.1 */ +#define PCIE_TLP_FMT_3DW_NO_DATA 0x00 /* 3DW header, no data */ +#define PCIE_TLP_FMT_4DW_NO_DATA 0x01 /* 4DW header, no data */ +#define PCIE_TLP_FMT_3DW_DATA 0x02 /* 3DW header, with data */ +#define PCIE_TLP_FMT_4DW_DATA 0x03 /* 4DW header, with data */ + +/* Type of TLP; PCIe r5.0, sec 2.2.1 */ +#define PCIE_TLP_TYPE_CFG0_RD 0x04 /* Config Type 0 Read Request */ +#define PCIE_TLP_TYPE_CFG0_WR 0x04 /* Config Type 0 Write Request */ +#define PCIE_TLP_TYPE_CFG1_RD 0x05 /* Config Type 1 Read Request */ +#define PCIE_TLP_TYPE_CFG1_WR 0x05 /* Config Type 1 Write Request */ + extern const unsigned char pcie_link_speed[]; extern bool pci_early_dump; -- 2.43.0