From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 235E5CCF9EA for ; Mon, 27 Oct 2025 09:59:43 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [127.0.0.1]) by lists.ozlabs.org (Postfix) with ESMTP id 4cw89135gpz3c1T; Mon, 27 Oct 2025 20:58:45 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; arc=none smtp.remote-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1761559125; cv=none; b=MFL+Kx1C48kth7hgVvjZ7GzVUOqkCB6ls9tTX03mUrQm0U5sPrnnPlQRNd6VeCFT1ZCFzxD2Id3n61j6QfTHxr2E7+7kcadVvvAPjQs64T7OcRPz2c/iYPuo+yvu2LZHmSmzjXMhWdnHuXVVYmz6YDy5Qu5X+z3g5ZuMzemTi4Di/XBGuZFd07XwT79dYAw9147lZBx9IJ2zCQOt8YJ6+sekZkKZSw2amK9ztXg1ThHwuQWYh/wPmrp54Mb04SwrhG5811S7NnmUQ0/9iWLXKGS8a8QY7u6Y6xPwbgJ7W/GwHIOJaEgyr6Awxny149SdYRRZpShSg77GC8O9QlzntA== ARC-Message-Signature: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1761559125; c=relaxed/relaxed; bh=cvg1Ta8rWtoQoYrjOAiG/QHi60GLvBP9/tqlZR46NZQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=jhfI4KaeSHQhk95n3q7MbO+Yeqk/28uWPOC0o/jqa2hc3yB+e9l6jPhgDWnlUNqpfx92grtRl/D715lYoIB9CE3aqYa+qGea/bEo7CQwHCZWrd67lYA0B5n+D4Vc/nNQoGTPjScVFpEI0br8CLyGAjB2c1qn1CIcOoMAD9gToJhXbTl5nItvuNiOKch6W97XfANvnArNg/JyKu5dbjNlos3ooKv8mG0vUgZrIkRDJdnvx1mZjIN7QSTVbSCIjddtl08GqS5OsTr7xZLQPqK1wiiJOHy56ie9AYJEB6YeDYGUd6lXiicM4KhpHbgm7ys31p3de+OCTVg9FnChUX7oQA== ARC-Authentication-Results: i=1; lists.ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass (client-ip=211.20.114.72; helo=twmbx01.aspeed.com; envelope-from=jacky_chou@aspeedtech.com; receiver=lists.ozlabs.org) smtp.mailfrom=aspeedtech.com Authentication-Results: lists.ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=aspeedtech.com (client-ip=211.20.114.72; helo=twmbx01.aspeed.com; envelope-from=jacky_chou@aspeedtech.com; receiver=lists.ozlabs.org) Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4cw8906hBXz3c8W; Mon, 27 Oct 2025 20:58:44 +1100 (AEDT) Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 27 Oct 2025 17:58:25 +0800 Received: from mail.aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 27 Oct 2025 17:58:25 +0800 From: Jacky Chou To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v4 4/9] ARM: dts: aspeed-g6: Add AST2600 PCIe RC PERST# Date: Mon, 27 Oct 2025 17:58:20 +0800 Message-ID: <20251027095825.181161-5-jacky_chou@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251027095825.181161-1-jacky_chou@aspeedtech.com> References: <20251027095825.181161-1-jacky_chou@aspeedtech.com> X-Mailing-List: linux-aspeed@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Add pinctrl support for PCIe RC PERST#. Signed-off-by: Jacky Chou --- arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi index e87c4b58994a..d46f2047135c 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi @@ -2,6 +2,11 @@ // Copyright 2019 IBM Corp. &pinctrl { + pinctrl_pcierc1_default: pcierc1-default { + function = "PCIERC1"; + groups = "PCIERC1"; + }; + pinctrl_adc0_default: adc0_default { function = "ADC0"; groups = "ADC0"; -- 2.34.1