From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A2B3CCF9EA for ; Mon, 27 Oct 2025 10:00:26 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [127.0.0.1]) by lists.ozlabs.org (Postfix) with ESMTP id 4cw8932ff2z3cZj; Mon, 27 Oct 2025 20:58:47 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; arc=none smtp.remote-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1761559127; cv=none; b=kfvUpqpPRFK2X/8C88kiPwfjuYUxK7qfzonIbE0WWE9W9nZtC5P0fLUcGoZ8kmrzrXu1tk825xF2dOVQDZPzoNPL+vYugN2UfkFUSw2umUKKZpehsCH0ZsXYcGDhfMSwg5LgsFE7UsJwOpkue/ZLvzELW2jnF3pnEI2QArUWhGv0kpgBsAWus+ZGznnRfQ+vz/ie9MXD9ClbmY/6h45hwpIi0hn9n2DpU+j36VyFja9kIh0QPg7dWbO0AoDBw+RRcz+7lTqfHp5TbMglEf5Q/zLYJ/6UfvNgQg2t5KZ9qLU/CBTSzsdAyCfrk/p+URhKk6qU/N7ua2smoHjyRAoHXQ== ARC-Message-Signature: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1761559127; c=relaxed/relaxed; bh=Mx0wbcJusxdWDWeeR/W1dlzX+Zib8pRJ+o3I/Zf5n0Q=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=H+AuEkuZc9nZRaPNcUxQjl3S4Toh1Ul+qg2JvX5smKy6YmNCMg0SF//6APLv/1mBNN3IhgY1bEb1ARFz7hW2pey/SZiPkMohwWEZzP0duEm2IO/BSIMRqaWWnosBv2SaaTm96ZB/5qj3aKGssdeHOTcaXP7QaRfwO0Y97D2KKKXkhI0M5CBfSC9HqPaYAsgSK5DgNTsejpnF4YSRnc49BFuxq3ra1JpPez7KfPWV2w/TG1kje57QeCtF6ELF9RJ/3jS8GS83eNhf+uyHJ16JQX0Li5cKbyzbIvuiKin2g45fEeJZMeTqBt4SCPDuTi2QL1tNbiLJG2a6Ck9sSHClqA== ARC-Authentication-Results: i=1; lists.ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass (client-ip=211.20.114.72; helo=twmbx01.aspeed.com; envelope-from=jacky_chou@aspeedtech.com; receiver=lists.ozlabs.org) smtp.mailfrom=aspeedtech.com Authentication-Results: lists.ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=aspeedtech.com (client-ip=211.20.114.72; helo=twmbx01.aspeed.com; envelope-from=jacky_chou@aspeedtech.com; receiver=lists.ozlabs.org) Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4cw89265bjz3cgy; Mon, 27 Oct 2025 20:58:46 +1100 (AEDT) Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 27 Oct 2025 17:58:26 +0800 Received: from mail.aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 27 Oct 2025 17:58:26 +0800 From: Jacky Chou To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v4 7/9] PCI: Add FMT, TYPE and CPL status definition for TLP header Date: Mon, 27 Oct 2025 17:58:23 +0800 Message-ID: <20251027095825.181161-8-jacky_chou@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251027095825.181161-1-jacky_chou@aspeedtech.com> References: <20251027095825.181161-1-jacky_chou@aspeedtech.com> X-Mailing-List: linux-aspeed@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain According to PCIe specification, add FMT, TYPE and CPL status definition for TLP header. Signed-off-by: Jacky Chou --- drivers/pci/pci.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 4492b809094b..9e5cf35409c8 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -88,6 +88,21 @@ struct pcie_tlp_log; #define PCI_BUS_BRIDGE_MEM_WINDOW 1 #define PCI_BUS_BRIDGE_PREF_MEM_WINDOW 2 +/* Format of TLP; PCIe r7.0, sec 2.2.1 */ +#define PCIE_TLP_FMT_3DW_NO_DATA 0x00 /* 3DW header, no data */ +#define PCIE_TLP_FMT_4DW_NO_DATA 0x01 /* 4DW header, no data */ +#define PCIE_TLP_FMT_3DW_DATA 0x02 /* 3DW header, with data */ +#define PCIE_TLP_FMT_4DW_DATA 0x03 /* 4DW header, with data */ + +/* Type of TLP; PCIe r7.0, sec 2.2.1 */ +#define PCIE_TLP_TYPE_CFG0_RD 0x04 /* Config Type 0 Read Request */ +#define PCIE_TLP_TYPE_CFG0_WR 0x04 /* Config Type 0 Write Request */ +#define PCIE_TLP_TYPE_CFG1_RD 0x05 /* Config Type 1 Read Request */ +#define PCIE_TLP_TYPE_CFG1_WR 0x05 /* Config Type 1 Write Request */ + +/* Cpl. status of Complete; PCIe r7.0, sec 2.2.9.1 */ +#define PCIE_CPL_STS_SUCCESS 0x00 /* Successful Completion */ + extern const unsigned char pcie_link_speed[]; extern bool pci_early_dump; -- 2.34.1