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From: Billy Tsai <billy_tsai@aspeedtech.com>
To: Lee Jones <lee@kernel.org>, Rob Herring <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	"Joel Stanley" <joel@jms.id.au>,
	Andrew Jeffery <andrew@codeconstruct.com.au>,
	"Linus Walleij" <linusw@kernel.org>,
	Billy Tsai <billy_tsai@aspeedtech.com>,
	"Bartosz Golaszewski" <brgl@kernel.org>
Cc: Andrew Jeffery <andrew@aj.id.au>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
	<openbmc@lists.ozlabs.org>, <linux-gpio@vger.kernel.org>,
	<bmc-sw@aspeedtech.com>
Subject: [PATCH v3 1/3] Add compatible strings for AST2700 pinctrl to the SCU binding.
Date: Tue, 20 Jan 2026 19:43:05 +0800	[thread overview]
Message-ID: <20260120-upstream_pinctrl-v3-1-868fbf8413b5@aspeedtech.com> (raw)
In-Reply-To: <20260120-upstream_pinctrl-v3-0-868fbf8413b5@aspeedtech.com>

AST2700 consists of two interconnected SoC instances. Each SoC has
its own pinctrl register block, which needs to be described
independently in the device tree.

Introduce "aspeed,ast2700-soc0-pinctrl" for the SoC0 pinctrl, which
follows the same usage model as the existing AST2600 pinctrl.

The SoC1 pinctrl registers follow a regular and predictable layout,
which allows describing them using an existing generic pinctrl
binding without introducing a new SoC-specific compatible string.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
---
 Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
index da1887d7a8fe..ff6cf8f63cbc 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
+++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
@@ -87,6 +87,7 @@ patternProperties:
             - aspeed,ast2400-pinctrl
             - aspeed,ast2500-pinctrl
             - aspeed,ast2600-pinctrl
+            - aspeed,ast2700-soc0-pinctrl
 
     required:
       - compatible

-- 
2.34.1



  reply	other threads:[~2026-01-20 11:43 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-20 11:43 [PATCH v3 0/3] Add pinctrl support for AST2700 SoC Billy Tsai
2026-01-20 11:43 ` Billy Tsai [this message]
2026-01-20 12:12   ` [PATCH v3 1/3] Add compatible strings for AST2700 pinctrl to the SCU binding Krzysztof Kozlowski
2026-01-23  6:33   ` Andrew Jeffery
2026-02-11  7:06     ` Andrew Jeffery
2026-01-20 11:43 ` [PATCH v3 2/3] dt-bindings: pinctrl: aspeed: Add support for AST27xx Billy Tsai
2026-01-20 12:24   ` Krzysztof Kozlowski
2026-01-20 12:27   ` Rob Herring (Arm)
2026-01-20 11:43 ` [PATCH v3 3/3] pinctrl: aspeed: add G7(AST2700) SoC0 pinctrl support Billy Tsai
2026-01-20 12:27   ` Krzysztof Kozlowski
2026-01-29  6:43     ` Billy Tsai

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