From: Billy Tsai <billy_tsai@aspeedtech.com>
To: Linus Walleij <linusw@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: <linux-gpio@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
"Andrew Jeffery" <andrew@aj.id.au>, <devicetree@vger.kernel.org>,
<bmc-sw@aspeedtech.com>, Billy Tsai <billy_tsai@aspeedtech.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski@oss.qualcomm.com>
Subject: [PATCH v2 5/6] dt-bindings: gpio: aspeed,sgpio: Support ast2700
Date: Fri, 23 Jan 2026 17:26:30 +0800 [thread overview]
Message-ID: <20260123-upstream_sgpio-v2-5-69cfd1631400@aspeedtech.com> (raw)
In-Reply-To: <20260123-upstream_sgpio-v2-0-69cfd1631400@aspeedtech.com>
The AST2700 is the 7th generation SoC from Aspeed, featuring two SGPIO
master controllers: both with 256 serial inputs and outputs.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
---
Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
index 1046f0331c09..974185e3478f 100644
--- a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
@@ -10,7 +10,8 @@ maintainers:
- Andrew Jeffery <andrew@aj.id.au>
description:
- This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
+ This SGPIO controller is for ASPEED AST2400, AST2500, AST2600 and AST2700 SoC,
+ AST2700 have two sgpio master both with 256 pins,
AST2600 have two sgpio master one with 128 pins another one with 80 pins,
AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
GPIO pins can be programmed to support the following options
@@ -27,6 +28,7 @@ properties:
- aspeed,ast2400-sgpio
- aspeed,ast2500-sgpio
- aspeed,ast2600-sgpiom
+ - aspeed,ast2700-sgpiom
reg:
maxItems: 1
--
2.34.1
next prev parent reply other threads:[~2026-01-23 9:26 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-23 9:26 [PATCH v2 0/6] Add Aspeed G7 sgpio support Billy Tsai
2026-01-23 9:26 ` [PATCH v2 1/6] gpio: aspeed-sgpio: Change the macro to support deferred probe Billy Tsai
2026-01-23 9:26 ` [PATCH v2 2/6] gpio: aspeed-sgpio: Remove unused bank name field Billy Tsai
2026-01-23 9:26 ` [PATCH v2 3/6] gpio: aspeed-sgpio: Create llops to handle hardware access Billy Tsai
2026-01-23 9:26 ` [PATCH v2 4/6] gpio: aspeed-sgpio: Convert IRQ functions to use llops callbacks Billy Tsai
2026-01-23 9:26 ` Billy Tsai [this message]
2026-01-23 9:26 ` [PATCH v2 6/6] gpio: aspeed-sgpio: Support G7 Aspeed sgpiom controller Billy Tsai
2026-01-27 10:18 ` [PATCH v2 0/6] Add Aspeed G7 sgpio support Bartosz Golaszewski
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