From: Billy Tsai <billy_tsai@aspeedtech.com>
To: Linus Walleij <linusw@kernel.org>,
Tony Lindgren <tony@atomide.com>, "Rob Herring" <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
Bartosz Golaszewski <brgl@kernel.org>
Cc: <patrickw3@meta.com>, <linux-gpio@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-aspeed@lists.ozlabs.org>, <BMC-SW@aspeedtech.com>,
Billy Tsai <billy_tsai@aspeedtech.com>
Subject: [PATCH RFC 1/2] dt-bindings: pinctrl: Add pinctrl-packed
Date: Fri, 13 Feb 2026 16:17:42 +0800 [thread overview]
Message-ID: <20260213-pinctrl-single-bit-v1-1-c60f2fb80efb@aspeedtech.com> (raw)
In-Reply-To: <20260213-pinctrl-single-bit-v1-0-c60f2fb80efb@aspeedtech.com>
Add a Devicetree binding for a generic pin controller where pinmux and/or
pin configuration are represented as fixed-width fields packed
sequentially within shared registers.
The binding targets controllers that are typically exposed as subnodes of
a syscon node and accessed via regmap-mmio through the parent.
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
---
.../bindings/pinctrl/pinctrl-packed.yaml | 166 +++++++++++++++++++++
1 file changed, 166 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-packed.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-packed.yaml
new file mode 100644
index 000000000000..dd01ba2fed71
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-packed.yaml
@@ -0,0 +1,166 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/pinctrl-packed.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Generic Pin Controller with Packed-Field Registers
+
+maintainers:
+ - Billy Tsai <billy_tsai@aspeedtech.com>
+
+description:
+ This binding describes pin controller hardware where pinmux and/or
+ pin configuration fields are represented as fixed-width fields packed
+ sequentially within shared registers.
+
+ Such controllers are commonly embedded within a larger system control
+ unit (SCU) register block and may be exposed as subnodes of a syscon
+ device.
+
+ Conceptually, this model is related to the pinctrl-single binding,
+ but instead of describing individual register offsets via
+ <offset, value, mask> tuples, the hardware provides fixed-width,
+ per-pin fields packed linearly within shared registers.
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - pinctrl-packed
+ - pinconf-packed
+
+ reg:
+ maxItems: 1
+
+ '#pinctrl-cells':
+ description:
+ The pinctrl provider uses standard state nodes referenced by pinctrl-N
+ properties; consumers do not pass per-pin arguments via phandle.
+ const: 1
+
+ pinctrl-packed,function-mask:
+ description: Mask of the allowed register bits for a single pin.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ pinctrl-packed,gpio-range:
+ description: Optional list of pin base, nr pins & gpio function.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ items:
+ - description: phandle of a gpio-range node
+ - description: pin base
+ - description: number of pins
+ - description: gpio function
+
+patternProperties:
+ '-pins(-[0-9]+)?$|-pin$':
+ type: object
+ additionalProperties: false
+
+ properties:
+ pinctrl-packed,pins:
+ description: Array of pin index and function selector pairs.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+
+ pinctrl-packed,bias-pullup:
+ description: Optional bias pull-up configuration.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ maxItems: 4
+ items:
+ - description: Input value.
+ - description: Enabled pull-up bits.
+ - description: Disabled pull-up bits.
+ - description: Pull-up mask.
+ additionalItems: false
+
+ pinctrl-packed,bias-pulldown:
+ description: Optional bias pull-down configuration.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ maxItems: 4
+ items:
+ - description: Input value.
+ - description: Enabled pull-down bits.
+ - description: Disabled pull-down bits.
+ - description: Pull-down mask.
+ additionalItems: false
+
+ pinctrl-packed,drive-strength:
+ description: Optional drive strength configuration.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ maxItems: 2
+ items:
+ - description: Drive strength value.
+ - description: Drive strength mask.
+ additionalItems: false
+
+ pinctrl-packed,input-schmitt:
+ description: Optional input Schmitt trigger configuration.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ maxItems: 2
+ items:
+ - description: Schmitt trigger value.
+ - description: Schmitt trigger mask.
+ additionalItems: false
+
+ pinctrl-packed,input-schmitt-enable:
+ description: Optional input Schmitt enable configuration.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ maxItems: 4
+ items:
+ - description: Input value.
+ - description: Enable bits.
+ - description: Disable bits.
+ - description: Schmitt mask.
+ additionalItems: false
+
+ pinctrl-packed,low-power-mode:
+ description: Optional low power mode configuration.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ maxItems: 2
+ items:
+ - description: Low power value.
+ - description: Low power mask.
+ additionalItems: false
+
+ pinctrl-packed,slew-rate:
+ description: Optional slew rate configuration.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ maxItems: 2
+ items:
+ - description: Slew rate value.
+ - description: Slew rate mask.
+ additionalItems: false
+
+required:
+ - compatible
+ - reg
+ - "#pinctrl-cells"
+ - pinctrl-packed,function-mask
+
+additionalProperties: false
+
+allOf:
+ - $ref: pinctrl.yaml#
+
+examples:
+ - |
+ syscon@0 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x0 0x1000>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pinctrl@400 {
+ compatible = "pinctrl-packed";
+ reg = <0x400 0x80>;
+ #pinctrl-cells = <1>;
+ pinctrl-packed,function-mask = <0xf>;
+
+ uart0-pins {
+ /* <pin_index function_select> pairs */
+ pinctrl-packed,pins = <0 2>, <1 2>;
+ };
+ };
+ };
--
2.34.1
next prev parent reply other threads:[~2026-02-13 8:18 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-13 8:17 [PATCH RFC 0/2] pinctrl: add syscon-backed packed-field pinctrl driver and DT bindings Billy Tsai
2026-02-13 8:17 ` Billy Tsai [this message]
2026-02-13 9:57 ` [PATCH RFC 1/2] dt-bindings: pinctrl: Add pinctrl-packed Krzysztof Kozlowski
2026-02-13 13:47 ` Linus Walleij
2026-02-13 8:17 ` [PATCH RFC 2/2] pinctrl: add syscon-backed packed-field pin controller driver Billy Tsai
-- strict thread matches above, loose matches on Subject: below --
2026-02-18 16:13 [PATCH RFC 1/2] dt-bindings: pinctrl: Add pinctrl-packed Billy Tsai
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260213-pinctrl-single-bit-v1-1-c60f2fb80efb@aspeedtech.com \
--to=billy_tsai@aspeedtech.com \
--cc=BMC-SW@aspeedtech.com \
--cc=andrew@codeconstruct.com.au \
--cc=brgl@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=joel@jms.id.au \
--cc=krzk+dt@kernel.org \
--cc=linusw@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-aspeed@lists.ozlabs.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=patrickw3@meta.com \
--cc=robh@kernel.org \
--cc=tony@atomide.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox