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Wed, 20 May 2026 14:43:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1779288212; bh=dQbuftW1Dswfh8UjRtvt8jMWgNKtgGpobxc7mm/y8M8=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=MEYFAo/sifgemFgE3i2c/qG0t36EfY4Vm8VA6haQyEKuAPOKWhwYAvREwF30EcIJ+ idMTk38KIuZ7UmRhX+7E4W94DWidnrTjobRmZVjvFtR739eHNPepO0YSa3z7LTCIEs EYg5JEAqiduiOsJ//BLw58uKmr7rOk8ELb4QbsnM3nYDfcdEdnORaid5pl2iBg9uVV vFp1JA07vMb2hpQgqfHIUjpq3C3CZrKTF1zPE0sHjuyaTi9fDOZ/cKT6Aj1lVk37OR Rs8BoDIFlxaSenFjEnsmQcofS8cRMab87wKT/ix8M5OmV/RX4u8tLOeDk/okJc+6C4 xuRPeJx8L88/g== Date: Wed, 20 May 2026 15:43:26 +0100 From: Lee Jones To: Linus Walleij Cc: Billy Tsai , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Bartosz Golaszewski , Ryan Chen , Andrew Jeffery , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-gpio@vger.kernel.org, linux-clk@vger.kernel.org Subject: Re: [PATCH v9 2/3] dt-bindings: mfd: aspeed,ast2x00-scu: Describe AST2700 SCU0 Message-ID: <20260520144326.GE2767592@google.com> References: <20260506-upstream_pinctrl-v9-0-0636e22343ad@aspeedtech.com> <20260506-upstream_pinctrl-v9-2-0636e22343ad@aspeedtech.com> X-Mailing-List: linux-aspeed@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Mon, 11 May 2026, Linus Walleij wrote: > On Wed, May 6, 2026 at 10:07 AM Billy Tsai wrote: > > > AST2700 consists of two interconnected SoC instances, each with its own > > System Control Unit (SCU). The SCU0 provides pin control, interrupt > > controllers, clocks, resets, and address-space mappings for the > > Secondary and Tertiary Service Processors (SSP and TSP). > > > > Describe the SSP/TSP address mappings using the standard > > memory-region and memory-region-names properties. > > > > Disallow legacy child nodes that are not present on AST2700, including > > p2a-control and smp-memram. The latter is unnecessary as software can > > access the scratch registers via the SCU syscon. > > > > Also allow the AST2700 SoC0 pin controller to be described as a child > > node of the SCU0, and add an example illustrating the SCU0 layout, > > including reserved-memory, interrupt controllers, and pinctrl. > > > > Reviewed-by: Rob Herring (Arm) > > Signed-off-by: Billy Tsai > > This is an MFD patch in the middle of a pinctrl series, I think Lee > should apply this. > FWIW: > Acked-by: Linus Walleij Already applied v8. -- Lee Jones