From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AD561C55ABF for ; Wed, 5 Aug 2026 23:58:59 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [127.0.0.1]) by lists.ozlabs.org (Postfix) with ESMTP id 4hFnSL1g99z2ylj; Thu, 06 Aug 2026 09:58:58 +1000 (AEST) Authentication-Results: lists.ozlabs.org; arc=none smtp.remote-ip=172.234.252.31 ARC-Seal: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1785934994; cv=none; b=SNKHBP0H9VnzotWpYqU0zLN+kdHEBTr0CY8mwJ/4x1WFRT/A9SqYHJMUnNXSIYx91EYLugIkDE9AjU0Yk/0oqy/U7kxwEDjPjnWCkMd3MlHKmOqzjCZAdvHcgl/BkkCmH/jVnxlB0zszCwoY4NfJATdj4ho0wg12pWYnLBzAtnPohjROI/fhq/7BG1CG7I0rG6rgymSp9O8z3neAObh8IGTb1xN1QFiKLyUtiOeA6xRM4Di91wOksiKxc6ZbAMaDI/jZHy83Rr/TB7G6KJTpiHvilpGeQ3Zol33bA7pW0wfIfw1lFaL/hgx4UNLhfuRKhCKT8sVu/tq9T0XTFGpptg== ARC-Message-Signature: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1785934994; c=relaxed/relaxed; bh=gl7pzEDzH9tjdIyxD95ZeyTVYyxrwo2K+cstBIKfrsw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=d1YdRCyaLT9vbtBSSawyUTKvHmZ8eLnalmetfT6B56qZYbEjIeno2rLG7RLxHcG5VJLhbWKON2oZatnF2f/QylQv3EjVAk5w2jaBklQtcE7Fu3wYRpV43LVtg09M5+P8HvpNQA69OM8OHHPvwZsnMaF2PN3S3/kBtMjV1xMpygrjK7rmnZoXTYrgW0pRlxC7+sAH8Bbl3Fp2krdhADTSwP29X+Z8Z2lQWlSMVOd0hzskgp5Guc+t3EJL6YRztOBI/kYpIHqfJDp7z507ihRa1Csl8NzK7w0qZpvq1lZs6wZfbVU32FpCwwA2gwuKxlQvUrhVkaZP2bf0QcgnY+dGPA== ARC-Authentication-Results: i=1; lists.ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=kernel.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=aqUtzAz7; dkim-atps=neutral; spf=pass (client-ip=172.234.252.31; helo=sea.source.kernel.org; envelope-from=devnull+u8813345.gmail.com@kernel.org; receiver=lists.ozlabs.org) smtp.mailfrom=kernel.org Authentication-Results: lists.ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=kernel.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=aqUtzAz7; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kernel.org (client-ip=172.234.252.31; helo=sea.source.kernel.org; envelope-from=devnull+u8813345.gmail.com@kernel.org; receiver=lists.ozlabs.org) Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4hFVvk1Vcjz30B0 for ; Wed, 05 Aug 2026 23:03:14 +1000 (AEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id EEE9A436F6; Wed, 5 Aug 2026 13:03:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id A8E8AC32782; Wed, 5 Aug 2026 13:03:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1785934989; bh=295IKqaeCumSuUEaZhnHHBluCh18/amZPEFle+tiP3I=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=aqUtzAz7wMWIifL/9j2Sp0mbsil3VkPEhviwvPTfrYov+yKHlq+d/NrOTLgw8S8eF P3ChY3fpGGeLiL3UOAV2rrFKOLomSQmSs5nfTMwMWB6N9EqZLYejL+RpVY4ElPbJC1 dDXevHUtaods4lOMHHN7kqMn8aXth7dBqzAN7hHFloAFpX71JDM4jjbRUDxGcJsNrg 0+r+dJJSflGUXL8hzvSvpYtO1/0m/Czk1i7BJnAhDO8mVIWh/dDMHvJVglVkK/z8UM 3PR2MKjP3rKmb8EjKa8gczHjdLPrXuuUITWP60Qx0ofxhWRTlD8cc3qPauJufxS+PV p+J17SilMJ3lw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97801C55ABF; Wed, 5 Aug 2026 13:03:09 +0000 (UTC) From: Colin Huang via B4 Relay Date: Wed, 05 Aug 2026 21:02:40 +0800 Subject: [PATCH v4 12/12] ARM: dts: aspeed: anacapa: Add SPI flash VCC supply X-Mailing-List: linux-aspeed@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260805-anacapa-devlop-phase-devicetree-v4-12-5d67e0efa6c5@gmail.com> References: <20260805-anacapa-devlop-phase-devicetree-v4-0-5d67e0efa6c5@gmail.com> In-Reply-To: <20260805-anacapa-devlop-phase-devicetree-v4-0-5d67e0efa6c5@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, colin.huang2@amd.com, Colin Huang , Rex Fu X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785934963; l=941; i=u8813345@gmail.com; s=20260202; h=from:subject:message-id; bh=f6LU0FAv4z223NfwbW5+xtWf2s69Q4QEuw+6jPL4YpI=; b=GU4HitdnZN9sIeaoEOIxc65OCZhYrjGp2dE2uozcgTcLXfDoR3GiEE+rtDALj7McAzfnsWjol g0HDu9Sad81Bonn1sgWxibVjHcRfneq+glygtwO4gZYOXQaVxuvb6zd X-Developer-Key: i=u8813345@gmail.com; a=ed25519; pk=Zlg0WqpCw4qbswOqamTBTXIchwR/3SnYZpy7rjaGMdQ= X-Endpoint-Received: by B4 Relay for u8813345@gmail.com/20260202 with auth_id=761 X-Original-From: Colin Huang Reply-To: u8813345@gmail.com From: Rex Fu Specify the 3.3 V auxiliary rail as the SPI flash VCC supply to avoid using the dummy regulator during device initialization. Signed-off-by: Rex Fu --- .../boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts index f913fa3f622d..cb4b815f1803 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts @@ -27,6 +27,22 @@ / { i2c51 = &i2c10mux0ch0; }; +&fmc { + flash@0 { + vcc-supply = <&p3v3_bmc_aux>; + }; + flash@1 { + vcc-supply = <&p3v3_bmc_aux>; + }; +}; + +// BIOS Flash +&spi2 { + flash@0 { + vcc-supply = <&p3v3_bmc_aux>; + }; +}; + // MB - PDB &i2c8 { i2c-mux@72 { -- 2.34.1