From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1839C5DF8C for ; Mon, 24 Aug 2026 02:42:56 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [127.0.0.1]) by lists.ozlabs.org (Postfix) with ESMTP id 4hSwF912jBz2y2h; Mon, 24 Aug 2026 12:42:53 +1000 (AEST) Authentication-Results: lists.ozlabs.org; arc=none smtp.remote-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1787539373; cv=none; b=WXtYN5Q0wh1vucCf2ycnp3a6lBJtRiiI8OyjxU473IsT0ng9GLCVS9fNgglGdlE4MN7fDKkwbLpIYLt+SQlcryKZBnXkG/nrQ9qc6u1ORKCfWbQDNTKbCfosIaB9KCtd6NuzCntHPt9rprmUYjlsgQGeFrntPIerzWn6miPDiNFgjs3pNB1aHLQa///6+vKCf3s907frSaOnDFuHxYw+w1Ixfr+6Fw4ZlzUD0jf9u7lC71uRKGTZmpUgVjcoAC7cHZraxuWhZ9KB4Dd42zyAOk5PEqYb1hqHbWeOhDTI7bzO5YIoAo4hR8fqUN1RTTOUprxn3l8jdJ7JzhsCU+zK5A== ARC-Message-Signature: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1787539373; c=relaxed/relaxed; bh=Bv42BCq0VbJx83T3QQNyUqvHP1MGmtolrNTMYYRob5Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=EhrV0qrpdVt0dRFEA5O+vc5BZDAeKc1nBgYqlaQasMgsswNME5rbnDlds6v3iTvCC5c2y8u+K6NC70xsdohhv0INehusxhIdOcxEECkF1Gi7si4Fj8trUCOdiYzIi5mc8fx2XkaN0Ur3UpsSB5AsWkVrrr7p0oPZknNsZCO4LelhrJeZ+p53BZBqCj24qYJhNtrkyErs7XHo/A/xvzzjIlf9YCWqfAWEMIBtHIIneCcvwOYviIRjvnILC2dS/X4oQ7VTQAyXzuH9RNtLQQRJ4KbDDYa3H3YJH6GTtoOIGxdpzyJilLJSNhjMN1g2rioQJbe6wNMySMAxJ1/aeT6Qiw== ARC-Authentication-Results: i=1; lists.ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass (client-ip=211.20.114.72; helo=twmbx01.aspeedtech.com; envelope-from=ryan_chen@aspeedtech.com; receiver=lists.ozlabs.org) smtp.mailfrom=aspeedtech.com Authentication-Results: lists.ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=aspeedtech.com (client-ip=211.20.114.72; helo=twmbx01.aspeedtech.com; envelope-from=ryan_chen@aspeedtech.com; receiver=lists.ozlabs.org) Received: from twmbx01.aspeedtech.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4hSwF82Jbsz2xmk for ; Mon, 24 Aug 2026 12:42:52 +1000 (AEST) Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 24 Aug 2026 10:42:29 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 24 Aug 2026 10:42:29 +0800 From: Ryan Chen Date: Mon, 24 Aug 2026 10:42:31 +0800 Subject: [PATCH v2 4/8] EDAC/aspeed: Clean up whitespace and include ordering X-Mailing-List: linux-aspeed@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20260824-edac-v2-4-c8d8bb693586@aspeedtech.com> References: <20260824-edac-v2-0-c8d8bb693586@aspeedtech.com> In-Reply-To: <20260824-edac-v2-0-c8d8bb693586@aspeedtech.com> To: Stefan Schaeckeler , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Borislav Petkov , Tony Luck CC: , , , , , Ryan Chen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787539349; l=4626; i=ryan_chen@aspeedtech.com; s=20251126; h=from:subject:message-id; bh=FhGqCgC1qcv7kHcNVhXGaiiu15ASlL/TX82CfVZ7NtU=; b=GoygC2E3grvnPd/Rs5Ery9rOw8CZ2YdTHWs1JTllbAufHdcDhqmniCvIr3gty9x43Vlyq1Pzb X3NhroraJhdCdJOYlFiEs3dh3IsGOe5FHGgeBVNvzZoIfwSoJOtCGuK X-Developer-Key: i=ryan_chen@aspeedtech.com; a=ed25519; pk=Xe73xY6tcnkuRjjbVAB/oU30KdB3FvG4nuJuILj7ZVc= The driver separates functions and definition groups with two blank lines where the kernel style uses one, its headers are not sorted, and it includes linux/stop_machine.h without using it. Collapse the double blank lines, drop the unused include and sort the rest alphabetically so the following changes start from a consistent style. Signed-off-by: Ryan Chen --- drivers/edac/aspeed_edac.c | 34 +++++++++------------------------- 1 file changed, 9 insertions(+), 25 deletions(-) diff --git a/drivers/edac/aspeed_edac.c b/drivers/edac/aspeed_edac.c index e05ebed5c2f2..cd2a6fcca355 100644 --- a/drivers/edac/aspeed_edac.c +++ b/drivers/edac/aspeed_edac.c @@ -4,20 +4,17 @@ */ #include -#include #include #include -#include -#include #include +#include #include +#include #include #include "edac_module.h" - #define DRV_NAME "aspeed-edac" - #define ASPEED_MCR_PROT 0x00 /* protection key register */ #define ASPEED_MCR_CONF 0x04 /* configuration register */ #define ASPEED_MCR_INTR_CTRL 0x50 /* interrupt control/status register */ @@ -25,19 +22,16 @@ #define ASPEED_MCR_ADDR_REC 0x5c /* address of last recoverable error */ #define ASPEED_MCR_LAST ASPEED_MCR_ADDR_REC - -#define ASPEED_MCR_PROT_PASSWD 0xfc600309 -#define ASPEED_MCR_CONF_DRAM_TYPE BIT(4) -#define ASPEED_MCR_CONF_ECC BIT(7) -#define ASPEED_MCR_INTR_CTRL_CLEAR BIT(31) -#define ASPEED_MCR_INTR_CTRL_CNT_REC GENMASK(23, 16) -#define ASPEED_MCR_INTR_CTRL_CNT_UNREC GENMASK(15, 12) -#define ASPEED_MCR_INTR_CTRL_ENABLE (BIT(0) | BIT(1)) - +#define ASPEED_MCR_PROT_PASSWD 0xfc600309 +#define ASPEED_MCR_CONF_DRAM_TYPE BIT(4) +#define ASPEED_MCR_CONF_ECC BIT(7) +#define ASPEED_MCR_INTR_CTRL_CLEAR BIT(31) +#define ASPEED_MCR_INTR_CTRL_CNT_REC GENMASK(23, 16) +#define ASPEED_MCR_INTR_CTRL_CNT_UNREC GENMASK(15, 12) +#define ASPEED_MCR_INTR_CTRL_ENABLE (BIT(0) | BIT(1)) static struct regmap *aspeed_regmap; - static int regmap_reg_write(void *context, unsigned int reg, unsigned int val) { void __iomem *regs = (void __iomem *)context; @@ -53,7 +47,6 @@ static int regmap_reg_write(void *context, unsigned int reg, unsigned int val) return 0; } - static int regmap_reg_read(void *context, unsigned int reg, unsigned int *val) { void __iomem *regs = (void __iomem *)context; @@ -76,7 +69,6 @@ static bool regmap_is_volatile(struct device *dev, unsigned int reg) } } - static const struct regmap_config aspeed_regmap_config = { .reg_bits = 32, .val_bits = 32, @@ -88,7 +80,6 @@ static const struct regmap_config aspeed_regmap_config = { .fast_io = true, }; - static void count_rec(struct mem_ctl_info *mci, u8 rec_cnt, u32 rec_addr) { struct csrow_info *csrow = mci->csrows[0]; @@ -120,7 +111,6 @@ static void count_rec(struct mem_ctl_info *mci, u8 rec_cnt, u32 rec_addr) 0, 0, -1, "", ""); } - static void count_un_rec(struct mem_ctl_info *mci, u8 un_rec_cnt, u32 un_rec_addr) { @@ -153,7 +143,6 @@ static void count_un_rec(struct mem_ctl_info *mci, u8 un_rec_cnt, } } - static irqreturn_t mcr_isr(int irq, void *arg) { struct mem_ctl_info *mci = arg; @@ -200,7 +189,6 @@ static irqreturn_t mcr_isr(int irq, void *arg) return IRQ_HANDLED; } - static int config_irq(void *ctx, struct platform_device *pdev) { int irq; @@ -225,7 +213,6 @@ static int config_irq(void *ctx, struct platform_device *pdev) return 0; } - static int init_csrows(struct mem_ctl_info *mci) { struct csrow_info *csrow = mci->csrows[0]; @@ -274,7 +261,6 @@ static int init_csrows(struct mem_ctl_info *mci) return 0; } - static int aspeed_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -355,7 +341,6 @@ static int aspeed_probe(struct platform_device *pdev) return rc; } - static void aspeed_remove(struct platform_device *pdev) { struct mem_ctl_info *mci; @@ -375,7 +360,6 @@ static void aspeed_remove(struct platform_device *pdev) edac_mc_free(mci); } - static const struct of_device_id aspeed_of_match[] = { { .compatible = "aspeed,ast2400-sdram-edac" }, { .compatible = "aspeed,ast2500-sdram-edac" }, -- 2.34.1