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Wed, 30 Sep 2026 15:26:55 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id B2917103281E9; Wed, 30 Sep 2026 17:26:47 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1790782013; h=from:subject:date:message-id:to:cc:mime-version:content-type: in-reply-to:references; bh=WKdkz1BYvLrQk/8aMA/M0VzHCoi8lQfFBU94QLV8ZrY=; b=YCigCSQ/jqKVGvnheb3+DGcKvvYgGY5QvVbgPml2ZqdCs1fe0uap+hqMvnedjqX5RbmJo/ 0+wacTSCNn+VDU+AanMmOpoloFY86p0C8dQd8Y0XKYpmiIvRdm0V2L3jOlWOFgWJUl6ocx U9n4cEtex4QKLKEXj7ItBIF0T7hKcE6RynSirU5B/lclASfld4seim4lyBTYwguZ+SDnB6 VLpiUKoHPhqDbqsCNkPK+/ogSn6TbkC/4pitlJe+zVLBV1AQTgv6Nfo1yzdrsDBd8zcT/Z ZYwSGoAaqEW+n/RnuMbDmHmK/kt7Lge14ZjxcZ+r+KzyCYnH0eQuWGI7PqkFgA== Date: Wed, 30 Sep 2026 17:26:46 +0200 From: Alexandre Belloni To: Billy Tsai Cc: Krzysztof Kozlowski , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Philipp Zabel , "linux-i3c@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-aspeed@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" Subject: Re: =?utf-8?B?5Zue6KaGOiBbUEFUQw==?= =?utf-8?Q?H?= 1/8] dt-bindings: i3c: Document the AST2700 I3C controller Message-ID: <2026093015264653e04d9e@mail.local> References: <20260901-b4-i3c-hci-ast2700-v1-0-19909e7cbd7e@aspeedtech.com> <20260901-b4-i3c-hci-ast2700-v1-1-19909e7cbd7e@aspeedtech.com> <20260907-imaginary-economic-oyster-57cdd6@quoll> <20260917154754dd1eefbe@mail.local> X-Mailing-List: linux-aspeed@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Last-TLS-Session-Version: TLSv1.3 On 24/09/2026 05:39:47+0000, Billy Tsai wrote: > > I guess we need to make them generic. Probably nobody needed them yet > > and not all the controllers will have support anyway. > > However, I would like to make sure we get enough commonality between > > controllers that support setting the timings individually, can you > > check? > > I went through dw-i3c-master, i3c-master-cdns, and the AMD/Xilinx AXI > I3C driver. Every property in this set has a direct counterpart in at > least one of them: > > - Open-drain and push-pull SCL high/low: dw-i3c-master has > SCL_I3C_OD_TIMING/SCL_I3C_PP_TIMING (high/low count each); the > AMD/Xilinx driver has separate SCL high/low and OD SCL high/low > registers. > - SDA/data hold time: the AMD/Xilinx driver has its own hold-time > register computed as a percentage of the low period; cdns has a > data hold delay explicitly there to meet the MIPI I3C tHD_PP > minimum "regardless of PCB balancing", their words for the same > board-variance concern we have. > - tCAS: dw-i3c-master's own comment says its MST_FREE register > represents tCAS in pure I3C mode; the AMD/Xilinx driver computes an > explicit tCAS minimum from the spec value. > > None of the three expose any of this through a DT property today. > They either derive it purely from the bus rate, or hardcode one fixed > value per compatible (cdns's data hold delay is a flat 10ns baked > into its per-SoC match data, the same default we picked > independently). So there's no existing naming convention to be > consistent with, but the underlying quantities are clearly common > across implementations, not something specific to our controller. > Thanks for the investigation, then let's have them in i3c.yaml. > Thanks > Billy -- Alexandre Belloni, co-owner and COO, Bootlin Embedded Linux and Kernel engineering https://bootlin.com