From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Lezcano Date: Mon, 5 Nov 2018 19:50:31 +0100 Subject: [PATCH v2] clocksource/drivers/fttmr010: fix invalid interrupt register access In-Reply-To: References: <20181003215350.3550926-1-taoren@fb.com> Message-ID: <279e6a06-3f2f-e736-f28e-4d099729a517@linaro.org> List-Id: To: linux-aspeed@lists.ozlabs.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit On 05/11/2018 19:43, Tao Ren wrote: > On 10/7/18, 2:03 PM, "Linus Walleij" wrote: >> >> On Wed, Oct 3, 2018 at 11:54 PM Tao Ren wrote: >> >>> TIMER_INTR_MASK register (Base Address of Timer + 0x38) is not designed >>> for masking interrupts on ast2500 chips, and it's not even listed in >>> ast2400 datasheet, so it's not safe to access TIMER_INTR_MASK on aspeed >>> chips. >>> >>> Similarly, TIMER_INTR_STATE register (Base Address of Timer + 0x34) is >>> not interrupt status register on ast2400 and ast2500 chips. Although >>> there is no side effect to reset the register in fttmr010_common_init(), >>> it's just misleading to do so. >>> >>> Besides, "count_down" is renamed to "is_aspeed" in "fttmr010" structure, >>> and more comments are added so the code is more readble. >>> >>> Signed-off-by: Tao Ren >>> --- >>> Changes in v2: >>> - "count_down" is renamed to "is_aspeed" in "fttmr010" structure. >>> - more comments are added to make the code more readable. >> >> Reviewed-by: Linus Walleij > > Hi Daniel / Thomas, > > Any further comments on the patch? Or is there anything needed from my side? Oh right, sorry. Should it go to stable also ? Is there a Fixes tag it can apply ? -- Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog