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From: Andrew Jeffery <andrew@codeconstruct.com.au>
To: Cool Lee <cool_lee@aspeedtech.com>,
	adrian.hunter@intel.com,  ulf.hansson@linaro.org, joel@jms.id.au,
	p.zabel@pengutronix.de,  linux-aspeed@lists.ozlabs.org,
	openbmc@lists.ozlabs.org,  linux-mmc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	 linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/8] mmc: sdhci-of-aspeed: Get max clockk by using default api
Date: Wed, 18 Jun 2025 12:09:09 +0930	[thread overview]
Message-ID: <4c380a2936fc5c1f37750f231eb48edc17aefa68.camel@codeconstruct.com.au> (raw)
In-Reply-To: <20250615035803.3752235-5-cool_lee@aspeedtech.com>

On Sun, 2025-06-15 at 11:57 +0800, Cool Lee wrote:
> Don't limit clock frequency by f_max.
> 
> Signed-off-by: Cool Lee <cool_lee@aspeedtech.com>
> ---
>  drivers/mmc/host/sdhci-of-aspeed.c | 10 +---------
>  1 file changed, 1 insertion(+), 9 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c
> index 10160a706334..2bdd93a3f91f 100644
> --- a/drivers/mmc/host/sdhci-of-aspeed.c
> +++ b/drivers/mmc/host/sdhci-of-aspeed.c
> @@ -288,14 +288,6 @@ static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
>         sdhci_enable_clk(host, clk);
>  }
>  
> -static unsigned int aspeed_sdhci_get_max_clock(struct sdhci_host *host)
> -{
> -       if (host->mmc->f_max)
> -               return host->mmc->f_max;
> -
> -       return sdhci_pltfm_clk_get_max_clock(host);
> -}
> -
>  static void aspeed_sdhci_set_bus_width(struct sdhci_host *host, int width)
>  {
>         struct sdhci_pltfm_host *pltfm_priv;
> @@ -446,7 +438,7 @@ static int aspeed_sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
>  static const struct sdhci_ops aspeed_sdhci_ops = {
>         .read_l = aspeed_sdhci_readl,
>         .set_clock = aspeed_sdhci_set_clock,
> -       .get_max_clock = aspeed_sdhci_get_max_clock,
> +       .get_max_clock = sdhci_pltfm_clk_get_max_clock,

This was used to limit the maximum bus speed via the devicetree. See:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?h=v6.16-rc2&id=0a0e8d7501cda79c9b20f6011814e2ec9b473ade

Why remove it? There's no discussion of the motivation in the commit
message.

Andrew


  reply	other threads:[~2025-06-18  2:39 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-15  3:57 [PATCH 0/8] Aspeed SDHCI driver workaround and auto tune Cool Lee
2025-06-15  3:57 ` [PATCH 1/8] mmc: sdhci-of-aspeed: Fix sdhci software reset can't be cleared issue Cool Lee
2025-06-16 13:22   ` Philipp Zabel
2025-06-18  2:14   ` Andrew Jeffery
2025-06-19  6:53     ` Cool Lee
2025-06-20  7:43       ` Andrew Jeffery
2025-06-21  8:29         ` Cool Lee
2025-06-15  3:57 ` [PATCH 2/8] mmc: sdhci-of-aspeed: Add runtime tuning Cool Lee
2025-06-18  2:31   ` Andrew Jeffery
2025-06-19  6:57     ` Cool Lee
2025-06-15  3:57 ` [PATCH 3/8] mmc: sdhci-of-aspeed: Patch HOST_CONTROL2 register missing after top reset Cool Lee
2025-06-18  2:32   ` Andrew Jeffery
2025-06-19  6:57     ` Cool Lee
2025-06-15  3:57 ` [PATCH 4/8] mmc: sdhci-of-aspeed: Get max clockk by using default api Cool Lee
2025-06-18  2:39   ` Andrew Jeffery [this message]
2025-06-20  8:18     ` Cool Lee
2025-06-15  3:58 ` [PATCH 5/8] mmc: sdhci-of-aspeed: Fix null pointer Cool Lee
2025-06-18  2:49   ` Andrew Jeffery
2025-06-20  8:18     ` Cool Lee
2025-06-15  3:58 ` [PATCH 6/8] mmc: sdhci-of-aspeed: Add output timing phase tuning Cool Lee
2025-06-18  2:51   ` Andrew Jeffery
2025-06-20  8:19     ` Cool Lee
2025-06-15  3:58 ` [PATCH 7/8] mmc: sdhci-of-aspeed: Remove timing phase Cool Lee
2025-06-18  2:56   ` Andrew Jeffery
2025-06-20 10:23     ` Cool Lee
2025-06-24 23:31       ` Andrew Jeffery
2025-06-25  0:22         ` Cool Lee
2025-06-25  0:23           ` Andrew Jeffery
2025-06-15  3:58 ` [PATCH 8/8] mmc: sdhci-of-aspeed: Add sdr50 support Cool Lee
2025-06-18  3:06   ` Andrew Jeffery

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