[PATCH] ARM: dts: aspeed: anacapa: add new sgpio line names

[PATCH] ARM: dts: aspeed: anacapa: add new sgpio line names

[Colin Huang]

Updated items:
- Add BMC_AINIC0_WP_R2_L and BMC_AINIC1_WP_R2_L
- Place LEAK_DETECT_RMC_N in the correct slot
- Add PRSNT_NFC_BOARD_R
- Add IRQ_NFC_BOARD_R and RSMRST_N
- Add DC_OFF, EAM_MOD_PWR_GD_TIMEOUT, CPLD_AMC_STBY_PWR_EN
- Add FM_MAIN_PWREN_RMC_EN_ISO

Signed-off-by: Colin Huang <u8813345@gmail.com>
---
The following changes are included:
- Add BMC_AINIC0_WP_R2_L and BMC_AINIC1_WP_R2_L
- Correct placement of LEAK_DETECT_RMC_N
- Add PRSNT_NFC_BOARD_R
- Add IRQ_NFC_BOARD_R and RSMRST_N
- Add DC_OFF, EAM_MOD_PWR_GD_TIMEOUT, CPLD_AMC_STBY_PWR_EN
- Add FM_MAIN_PWREN_RMC_EN_ISO
---
 .../boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts   | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts
index 221af858cb6b..37bccf64c77b 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts
@@ -852,15 +852,15 @@ &sgpiom0 {
 	"Channel1_leakage_EAM0", "FM_SCM_JTAG_MUX_SEL",
 	"Channel2_leakage_Manifold1", "FM_BRIDGE_JTAG_MUX_SEL",
 	"Channel3_leakage", "FM_CPU0_NMI_SYNC_FLOOD_N",
-	"Channel4_leakage_Manifold2", "",
-	"Channel5_leakage_EAM1", "",
+	"Channel4_leakage_Manifold2", "BMC_AINIC0_WP_R2_L",
+	"Channel5_leakage_EAM1", "BMC_AINIC1_WP_R2_L",
 	"Channel6_leakage_CPU_DIMM", "",
 	"Channel7_leakage_EAM2", "",
 
 	/* C0-C7 line 32-47 */
-	"RSVD_RMC_GPIO3", "", "", "",
+	"RSVD_RMC_GPIO3", "", "LEAK_DETECT_RMC_N", "",
+	"", "", "", "",
 	"", "", "", "",
-	"LEAK_DETECT_RMC_N", "", "", "",
 	"", "", "", "",
 
 	/* D0-D7 line 48-63 */
@@ -893,7 +893,7 @@ &sgpiom0 {
 	"PWRGD_CHIL_CPU0_FPGA", "",
 	"PWRGD_CHEH_CPU0_FPGA", "",
 	"PWRGD_CHAD_CPU0_FPGA", "FM_BMC_READY_PLD",
-	"", "",
+	"PRSNT_NFC_BOARD_R", "",
 
 	/* H0-H7 line 112-127 */
 	"PWRGD_P3V3", "",
@@ -922,7 +922,8 @@ &sgpiom0 {
 	"BRIDGE_R_MAIN_PG_R", "",
 	"BRIDGE_L_STBY_PG_R", "",
 	"BRIDGE_R_STBY_PG_R", "",
-	"", "", "", "",
+	"IRQ_NFC_BOARD_R", "",
+	"RSMRST_N", "",
 
 	/* K0-K7 line 160-175 */
 	"ADC_I2C_ALERT_N", "",
@@ -956,7 +957,9 @@ &sgpiom0 {
 	"AMC_STBY_PGOOD_R", "",
 	"CPU_AMC_SLP_S5_R_L", "",
 	"AMC_CPU_EAMPG_R", "",
-	"", "", "", "",
+	"DC_OFF", "",
+	"EAM_MOD_PWR_GD_TIMEOUT", "",
+	"CPLD_AMC_STBY_PWR_EN", "",
 
 	/* O0-O7 line 224-239 */
 	"HPM_PWR_FAIL", "Port80_b0",
@@ -966,7 +969,7 @@ &sgpiom0 {
 	"FM_CPU0_THERMTRIP_N", "Port80_b4",
 	"PVDDCR_SOC_P0_OCP_L", "Port80_b5",
 	"CPLD_SGPIO_RDY", "Port80_b6",
-	"", "Port80_b7",
+	"FM_MAIN_PWREN_RMC_EN_ISO", "Port80_b7",
 
 	/* P0-P7 line 240-255 */
 	"CPU0_SLP_S5_N_R", "NFC_VEN",

---
base-commit: 26705fad17bd111f062f4208df2dd60e7a9c2ecd
change-id: 20260202-anacapa-dts-sgpio-e4e0ba5c2cd5

Best regards,
-- 
Colin Huang <u8813345@gmail.com>

Re: [PATCH] ARM: dts: aspeed: anacapa: add new sgpio line names

[Andrew Jeffery]

Hi Colin,

On Mon, 2026-02-02 at 14:31 +0800, Colin Huang wrote:
> Updated items:

What's below repeats what the diff tells us, and as such isn't useful
information. The useful information is missing: The motivation for
these changes.

Why are you adding these now? Why were they not added previously? Are
they all in support of the same high-level feature? Or are multiple
features driving the addition of each of these line names? If there are
multiple motivations, why should these all be added in one patch and
not several?

Generally, please try to take onboard the suggestions here:

https://docs.kernel.org/process/submitting-patches.html#describe-your-changes

> - Add BMC_AINIC0_WP_R2_L and BMC_AINIC1_WP_R2_L
> - Place LEAK_DETECT_RMC_N in the correct slot

... for instance, why did it end up being described for the incorrect
slot? Was it just a mistake in the documentation? A mistake by the
original DTS author? Or a new (and incompatible) revision of the
hardware design?

Answering these kinds of questions tends to motivate making such
changes their own patch.

> - Add PRSNT_NFC_BOARD_R
> - Add IRQ_NFC_BOARD_R and RSMRST_N
> - Add DC_OFF, EAM_MOD_PWR_GD_TIMEOUT, CPLD_AMC_STBY_PWR_EN
> - Add FM_MAIN_PWREN_RMC_EN_ISO


> 
> Signed-off-by: Colin Huang <u8813345@gmail.com>
> ---
> The following changes are included:
> - Add BMC_AINIC0_WP_R2_L and BMC_AINIC1_WP_R2_L
> - Correct placement of LEAK_DETECT_RMC_N
> - Add PRSNT_NFC_BOARD_R
> - Add IRQ_NFC_BOARD_R and RSMRST_N
> - Add DC_OFF, EAM_MOD_PWR_GD_TIMEOUT, CPLD_AMC_STBY_PWR_EN
> - Add FM_MAIN_PWREN_RMC_EN_ISO

This repeats what's in the commit message and also isn't useful, though
at least it's not ultimately included in the commit itself.

> ---
>  .../boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts   | 19 +++++++++++--------
>  1 file changed, 11 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts
> index 221af858cb6b..37bccf64c77b 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts
> @@ -852,15 +852,15 @@ &sgpiom0 {
>  	"Channel1_leakage_EAM0", "FM_SCM_JTAG_MUX_SEL",
>  	"Channel2_leakage_Manifold1", "FM_BRIDGE_JTAG_MUX_SEL",
>  	"Channel3_leakage", "FM_CPU0_NMI_SYNC_FLOOD_N",
> -	"Channel4_leakage_Manifold2", "",
> -	"Channel5_leakage_EAM1", "",
> +	"Channel4_leakage_Manifold2", "BMC_AINIC0_WP_R2_L",
> +	"Channel5_leakage_EAM1", "BMC_AINIC1_WP_R2_L",
>  	"Channel6_leakage_CPU_DIMM", "",
>  	"Channel7_leakage_EAM2", "",
>  
>  	/* C0-C7 line 32-47 */
> -	"RSVD_RMC_GPIO3", "", "", "",
> +	"RSVD_RMC_GPIO3", "", "LEAK_DETECT_RMC_N", "",
> +	"", "", "", "",
>  	"", "", "", "",
> -	"LEAK_DETECT_RMC_N", "", "", "",
>  	"", "", "", "",
>  
>  	/* D0-D7 line 48-63 */
> @@ -893,7 +893,7 @@ &sgpiom0 {
>  	"PWRGD_CHIL_CPU0_FPGA", "",
>  	"PWRGD_CHEH_CPU0_FPGA", "",
>  	"PWRGD_CHAD_CPU0_FPGA", "FM_BMC_READY_PLD",
> -	"", "",
> +	"PRSNT_NFC_BOARD_R", "",
>  
>  	/* H0-H7 line 112-127 */
>  	"PWRGD_P3V3", "",
> @@ -922,7 +922,8 @@ &sgpiom0 {
>  	"BRIDGE_R_MAIN_PG_R", "",
>  	"BRIDGE_L_STBY_PG_R", "",
>  	"BRIDGE_R_STBY_PG_R", "",
> -	"", "", "", "",
> +	"IRQ_NFC_BOARD_R", "",
> +	"RSMRST_N", "",
>  
>  	/* K0-K7 line 160-175 */
>  	"ADC_I2C_ALERT_N", "",
> @@ -956,7 +957,9 @@ &sgpiom0 {
>  	"AMC_STBY_PGOOD_R", "",
>  	"CPU_AMC_SLP_S5_R_L", "",
>  	"AMC_CPU_EAMPG_R", "",
> -	"", "", "", "",
> +	"DC_OFF", "",
> +	"EAM_MOD_PWR_GD_TIMEOUT", "",
> +	"CPLD_AMC_STBY_PWR_EN", "",
>  
>  	/* O0-O7 line 224-239 */
>  	"HPM_PWR_FAIL", "Port80_b0",
> @@ -966,7 +969,7 @@ &sgpiom0 {
>  	"FM_CPU0_THERMTRIP_N", "Port80_b4",
>  	"PVDDCR_SOC_P0_OCP_L", "Port80_b5",
>  	"CPLD_SGPIO_RDY", "Port80_b6",
> -	"", "Port80_b7",
> +	"FM_MAIN_PWREN_RMC_EN_ISO", "Port80_b7",
>  
>  	/* P0-P7 line 240-255 */
>  	"CPU0_SLP_S5_N_R", "NFC_VEN",
> 
> ---
> base-commit: 26705fad17bd111f062f4208df2dd60e7a9c2ecd
> change-id: 20260202-anacapa-dts-sgpio-e4e0ba5c2cd5
> 
> Best regards,