From: Andy Shevchenko <andriy.shevchenko@intel.com>
To: Billy Tsai <billy_tsai@aspeedtech.com>
Cc: jic23@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com,
andy@kernel.org, joel@jms.id.au, andrew@codeconstruct.com.au,
linux-iio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] iio: adc: aspeed: clear reference voltage bits before configuring vref
Date: Tue, 28 Oct 2025 12:14:51 +0200 [thread overview]
Message-ID: <aQCXm_rvwpB6-UUq@smile.fi.intel.com> (raw)
In-Reply-To: <20251028054102.1954503-1-billy_tsai@aspeedtech.com>
On Tue, Oct 28, 2025 at 01:41:02PM +0800, Billy Tsai wrote:
> Ensures the reference voltage bits are cleared in the ADC engine
> control register before configuring the voltage reference. This
> avoids potential misconfigurations caused by residual bits.
>
> Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
> ---
It's a v2 and here a changelog is missing.
No need to resend, just reply with a missing piece.
--
With Best Regards,
Andy Shevchenko
prev parent reply other threads:[~2025-10-28 10:15 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-28 5:41 [PATCH v2] iio: adc: aspeed: clear reference voltage bits before configuring vref Billy Tsai
2025-10-28 10:14 ` Andy Shevchenko [this message]
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