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b=Gpcv1fUx1dQpgaLv2/ylGmzL11KKwB8+aZj1UVHoHzsW12u7dyBTA0zwniMV3chHs wx+79Fo2H2ZEmvsxikEiZgOMbzNVhVnr0SapZI1oR1ntxsNvM7LtMxLk2kfdxanrtQ Nm0DUJI2vMxQoy2B2ex0ATbPiIrSGWP1GiqD+/aubMAfBOKoSLs29VF06l536xKq/l J/A9/16HKUrq105km+eyBNTHX4kxY6HZ2d7PVGHBVBQ2bO1uKcORTn8Wc+xhJpHrNE g4stI0JzeaNimAQX5CfZUrNXF53LIVc/lE91MP+2m3HEM3A6oSyVZrVMZc5WHqfQ19 rstIY9+NTO5Mw== Received: from [192.168.68.117] (unknown [180.150.113.112]) by mail.codeconstruct.com.au (Postfix) with ESMTPSA id 1C18A608E3; Mon, 27 Jul 2026 09:03:22 +0800 (AWST) Message-ID: Subject: Re: [PATCH v2 2/2] ARM: dts: aspeed-g6: add pcie-kcs4 From: Andrew Jeffery To: =?ISO-8859-1?Q?Gr=E9goire?= Layet Cc: joel@jms.id.au, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, corey@minyard.net, devicetree@vger.kernel.org, openipmi-developer@lists.sourceforge.net, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Date: Mon, 27 Jul 2026 10:33:22 +0930 In-Reply-To: References: <0b97a66762efc05c9073c14112cc489624871947.1784732161.git.gregoire.layet@9elements.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2-0+deb13u1 X-Mailing-List: linux-aspeed@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Hi Gr=C3=A9goire, On Thu, 2026-07-23 at 09:56 +0200, Gr=C3=A9goire Layet wrote: > Hi Andrew, >=20 > > > =C2=A0arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 7 +++++++ > > > =C2=A01 file changed, 7 insertions(+) > > >=20 > > > diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/= dts/aspeed/aspeed-g6.dtsi > > > index 56bb3b0444f7..a93fa4cf5d8f 100644 > > > --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi > > > +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi > > > @@ -617,6 +617,13 @@ kcs4: kcs@114 { > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0 status =3D "disabled"; > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }; > > >=20 > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0 pcie_kcs4: kcs@914 { > >=20 > > Nodes need to be ordered by ascending address: >=20 > The existing kcs4 node is already not in ascending order of address. >=20 > 'kcs4: kcs@114' is before 'lpc_ctrl: lpc-ctrl@80' >=20 > pcie_kcs4 has been placed here to have ascending addresses locally on > the kcs nodes and still > having all the kcs nodes next to each other. This matches the kcs4 > node ordering. Understood, however: >=20 > If ascending address is still preferred, I'll change pcie_kcs4 order of c= ourse. My preference is that we don't add further style problems on top of those we already have :) Thanks, Andrew