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From: "Shulzhenko, Oleksandr" <oleksandr.shulzhenko@linux.intel.com>
To: YH Chung <yh_chung@aspeedtech.com>, Arnd Bergmann <arnd@arndb.de>,
	Andrew Jeffery <andrew@codeconstruct.com.au>,
	Conor Dooley <conor@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
	Ryan Chen <ryan_chen@aspeedtech.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-aspeed@lists.ozlabs.org" <linux-aspeed@lists.ozlabs.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"openbmc@lists.ozlabs.org" <openbmc@lists.ozlabs.org>,
	"maciej.lawniczak@intel.com" <maciej.lawniczak@intel.com>,
	Mark Brown <broonie@kernel.org>
Subject: Re: [PATCH 0/7] soc: aspeed: Add AST2600 eSPI controller support
Date: Thu, 7 May 2026 18:00:45 +0200	[thread overview]
Message-ID: <b1d56feb-9847-41b1-8bba-733963055cae@linux.intel.com> (raw)
In-Reply-To: <KL1PR0601MB427603A6A5768D6A537CAFCB905AA@KL1PR0601MB4276.apcprd06.prod.outlook.com>

On 4/7/2026 11:36 AM, YH Chung wrote:
> Hi Arnd,
>
> Thanks for the comments and questions.
>
>> These all seem to be viable options, but I still think we should focus on
>> agreeing on a design for the low-level hardware interface and whether this
>> can or should be abstracted between SoC vendor specific drivers before
>> trying to solve the user interface side.
>   
> Could you share your thoughts on whether it would make sense to accept our
> eSPI driver as is, and whether it should live under the SoC vendor-specific
> directories? Any comment would be greatly appreciated.
>
> Thanks,
> YunHsuan

Hi YunHsuan,

Let me add my 5 cents on this matter.

Integrating this driver into the SPI subsystem may allow reusing some 
existing definitions, e.g.|spi_controller|,|spi_message|, and perhaps 
parts related to single/dual/quad I/O handling. At the same time, parts 
such as the Flash channel (included in the current series), and OOB / 
Virtual Wire support (I would expect to come later), appear to be 
specific to the Intel eSPI protocol. Modeling all of that as just 
another SPI IP driver may introduce some awkward layering and overhead.

Also, the current series already seems to separate common eSPI logic 
from AST2600-specific pieces, assuming that 2700 driver is also coming 
at some point.

This makes me wonder whether a dedicated eSPI layer/subsystem could be a 
better fit — either under the SPI or as something separate (but not SoC 
driver).

Given my limited experience with SPI/eSPI, could you help clarify a few 
points for me (and probably others as well)?

  * How much of the SPI subsystem can be reused for this implementation,
    both for the current patchset and for likely future extensions?
  * Are there any pitfalls or abstraction mismatches in trying to reuse
    the SPI core here?

I think this would help make the subsystem placement discussion much 
clearer.




      reply	other threads:[~2026-05-07 16:01 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-13 10:07 [PATCH 0/7] soc: aspeed: Add AST2600 eSPI controller support aspeedyh
2026-03-13 10:07 ` [PATCH 1/7] dt-bindings: soc: aspeed: Add AST2600 eSPI controller aspeedyh
2026-03-16  7:07   ` Krzysztof Kozlowski
2026-03-16  8:17     ` YH Chung
2026-03-16 11:04       ` Conor Dooley
2026-03-17  8:43         ` YH Chung
2026-03-13 10:07 ` [PATCH 2/7] soc: aspeed: Introduce core eSPI controller support aspeedyh
2026-03-16  9:57   ` Philipp Zabel
2026-03-17  8:40     ` YH Chung
2026-03-13 10:07 ` [PATCH 3/7] soc: aspeed: Add AST2600 peripheral channel port I/O support aspeedyh
2026-05-07 14:03   ` Shulzhenko, Oleksandr
2026-03-13 10:07 ` [PATCH 4/7] soc: aspeed: Add eSPI TAFS backend support aspeedyh
2026-03-13 10:07 ` [PATCH 5/7] soc: aspeed: Add eSPI flash channel support aspeedyh
2026-03-19 23:53   ` kernel test robot
2026-03-20  1:17   ` kernel test robot
2026-03-20  4:19   ` kernel test robot
2026-03-13 10:07 ` [PATCH 6/7] soc: aspeed: Add sysfs controls for flash backend selection aspeedyh
2026-03-13 10:07 ` [PATCH 7/7] arm: dts: aspeed: Add eSPI node for AST2600 aspeedyh
2026-03-13 16:24 ` [PATCH 0/7] soc: aspeed: Add AST2600 eSPI controller support Conor Dooley
2026-03-13 16:32   ` Mark Brown
2026-03-13 16:48     ` Mark Brown
2026-03-16  3:07       ` YH Chung
2026-03-13 21:36   ` Arnd Bergmann
2026-03-14  1:02     ` Mark Brown
2026-03-16  6:06     ` Ivan Mikhaylov
2026-03-16  6:34     ` Andrew Jeffery
2026-03-17  8:14       ` YH Chung
2026-03-17  9:50         ` Arnd Bergmann
2026-03-25  8:41           ` YH Chung
2026-03-25 10:30             ` Arnd Bergmann
2026-03-27  4:14               ` YH Chung
2026-04-07  9:36                 ` YH Chung
2026-05-07 16:00                   ` Shulzhenko, Oleksandr [this message]

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