Re: [PATCH v2 2/2] ARM: dts: aspeed: add asrock x470d4u bmc

[Tan Siewert <tan@siewert.io>]

On 17.10.25 07:42, Andrew Jeffery wrote:
> On Sat, 2025-10-11 at 13:21 +0200, Tan Siewert wrote:
>> The ASRock Rack X470D4U X470D4U is a single-socket X470-based microATX
>> motherboard for Ryzen processors with an AST2500 BMC and either 32MB or
>> 64MB SPI flash.
>>
>> This mainboard exists in three known "flavors" which only differ in the
>> used host NIC, the BMC SPI size and some parts that may be un-populated.
>>
>> To keep the complexity low with the BMC SPI, use the 32MB layout
>> regardless of the used SPI or mainboard flavor.
>>
>> Signed-off-by: Tan Siewert <tan@siewert.io>
>> ---
>> v2:
>>    - fix led node names [robh]
>>    - fix missing gfx memory region and other offenses [Tan]
>> ---
>>   arch/arm/boot/dts/aspeed/Makefile             |   1 +
>>   .../dts/aspeed/aspeed-bmc-asrock-x470d4u.dts  | 350 ++++++++++++++++++
>>   2 files changed, 351 insertions(+)
>>   create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x470d4u.dts
>>
>> diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile
>> index 0f0b5b707654..c601af36915e 100644
>> --- a/arch/arm/boot/dts/aspeed/Makefile
>> +++ b/arch/arm/boot/dts/aspeed/Makefile
>> @@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
>>   	aspeed-bmc-asrock-e3c256d4i.dtb \
>>   	aspeed-bmc-asrock-romed8hm3.dtb \
>>   	aspeed-bmc-asrock-spc621d8hm3.dtb \
>> +	aspeed-bmc-asrock-x470d4u.dtb \
>>   	aspeed-bmc-asrock-x570d4u.dtb \
>>   	aspeed-bmc-asus-x4tf.dtb \
>>   	aspeed-bmc-bytedance-g220a.dtb \
>> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x470d4u.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x470d4u.dts
>> new file mode 100644
>> index 000000000000..e9804b0ace9f
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x470d4u.dts
>> @@ -0,0 +1,350 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/dts-v1/;
>> +
>> +#include "aspeed-g5.dtsi"
>> +#include <dt-bindings/gpio/aspeed-gpio.h>
>> +#include <dt-bindings/leds/common.h>
>> +#include <dt-bindings/interrupt-controller/irq.h>
>> +
>> +/ {
>> +	model = "Asrock Rack X470D4U-series BMC";
>> +	compatible = "asrock,x470d4u-bmc", "aspeed,ast2500";
>> +
>> +	aliases {
>> +		serial4 = &uart5;
>> +	};
>> +
>> +	chosen {
>> +		stdout-path = &uart5;
>> +	};
>>
>>
> 
> *snip*
> 
>> nvmem-cell-names = "mac-address";
>> +};
>> +
>> +&mac1 {
>> +	status = "okay";
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&pinctrl_rmii2_default &pinctrl_mdio2_default>;
> 
> If you're using NCSI you don't need the MDIO pins here, right?

Right. Will be addressed with v3.

Thanks!
Tan

> 
>> +	use-ncsi;
>> +
>> +	nvmem-cells = <&eth1_macaddress>;
>> +	nvmem-cell-names = "mac-address";
>> +};
>> +
> 
> Andrew