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charset=us-ascii Content-Disposition: inline In-Reply-To: On Mon, Aug 31, 2026 at 06:43:46AM +0530, Prasanth wrote: > Hi Andrew, > > I do not currently have the PCB layout or trace-length information, so I cannot > prove that the board provides the TX delay externally. > > What I have validated on hardware is: > > rgmii: fails, with RX CRC errors and no valid RX traffic > rgmii-rxid: passes, 5000/5000 packets, 0% loss, no RX CRC errors > rgmii-id: also passes with the same traffic test > > This shows that the RTL8211F RX internal delay is required, but it does not > establish where the TX delay is provided. > > Given that I cannot provide PCB-level evidence for the TX delay, would you > prefer that I use rgmii-id for the next revision? There has been a number of threads about the Aspeed SoC. It typically has delays enabled in its MAC, by the bootloader. The Linux MAC driver does not disable this, nor does it mask the value passed to the PHY. So you see many Aspeed .dts files incorrectly using 'rgmii'. Over the last couple of years i have been pointing out this problem, but nobody has stepped up to fix the issue. Most DT developers just leave the Ethernet node out, in order to get something merged. You case is interesting, because you are not suggesting 'rgmii'. So it could be there is more going on. If you look in the email archives you should find the information about where to configure the delay in the hardware. You might want to read it out to understand how the bootloader has configured the hardware. Andrew