From mboxrd@z Thu Jan  1 00:00:00 1970
From: Andrew Jeffery <andrew@aj.id.au>
Date: Tue, 25 May 2021 10:30:34 +0930
Subject: =?UTF-8?Q?Re:_[PATCH_v5_3/4]_ARM:_dts:_aspeed:_ast2600evb:_Add_dts_file_?=
 =?UTF-8?Q?for_A1_and_A0.?=
In-Reply-To: <20210524073308.9328-4-steven_lee@aspeedtech.com>
References: <20210524073308.9328-1-steven_lee@aspeedtech.com>
 <20210524073308.9328-4-steven_lee@aspeedtech.com>
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On Mon, 24 May 2021, at 17:02, Steven Lee wrote:
> aspeed-ast2600-evb.dts was modified for supporting A2 evb.
> Since A1/A0 evbs don't have GPIO regulators and SD clock frequency(SCU210)
> is different to A2 as well. Adding a new dts that removes new nodes
> created in aspeed-ast2600-evb.dts is necessary.
> 
> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>

Acked-by: Andrew Jeffery <andrew@aj.id.au>