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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Billy Tsai <billy_tsai@aspeedtech.com>,
	Lee Jones <lee@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
	Andrew Jeffery <andrew@codeconstruct.com.au>,
	Linus Walleij <linusw@kernel.org>,
	Bartosz Golaszewski <brgl@kernel.org>
Cc: Andrew Jeffery <andrew@aj.id.au>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
	openbmc@lists.ozlabs.org, linux-gpio@vger.kernel.org,
	bmc-sw@aspeedtech.com
Subject: Re: [PATCH v3 2/3] dt-bindings: pinctrl: aspeed: Add support for AST27xx
Date: Tue, 20 Jan 2026 13:24:58 +0100	[thread overview]
Message-ID: <f81c20f4-5e6a-4ec2-8946-a78bccc14e8f@kernel.org> (raw)
In-Reply-To: <20260120-upstream_pinctrl-v3-2-868fbf8413b5@aspeedtech.com>

On 20/01/2026 12:43, Billy Tsai wrote:
> Add bindings for the pin controller found in ASPEED AST27xx SoCs.
> 
> The AST2700 SoC consists of two interconnected SoC instances, each
> with its own pin controller register block managed by a separate
> System Control Unit (SCU).
> 
> Introduce the "aspeed,ast2700-soc0-pinctrl" compatible string to
> describe the SoC0 pin controller, which is not compatible with
> existing ASPEED pinctrl bindings.
> 
> The SoC1 pin controller follows a regular and predictable register
> layout and can be described using an existing generic pinctrl
> binding, therefore no dedicated AST2700-specific compatible string
> is introduced for it.
> 
> Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
> ---
>  .../bindings/mfd/aspeed,ast2x00-scu.yaml           |  27 +++++
>  .../pinctrl/aspeed,ast2700-soc0-pinctrl.yaml       | 130 +++++++++++++++++++++
>  2 files changed, 157 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
> index ff6cf8f63cbc..7eda8fddc560 100644
> --- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
> +++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
> @@ -164,4 +164,31 @@ examples:
>              reg = <0x7c 0x4>, <0x150 0x8>;
>          };
>      };
> +
> +  - |
> +    syscon@12c02000 {
> +        compatible = "aspeed,ast2700-scu0", "syscon", "simple-mfd";

No changes in the binding, so please do not add unnecessary examples.

Plus this makes little sense now in way you split patches :/. Either you
keep separate MFD from pinctrl for merging or, if not separate, you
squash patches.

Best regards,
Krzysztof


  reply	other threads:[~2026-01-20 12:25 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-20 11:43 [PATCH v3 0/3] Add pinctrl support for AST2700 SoC Billy Tsai
2026-01-20 11:43 ` [PATCH v3 1/3] Add compatible strings for AST2700 pinctrl to the SCU binding Billy Tsai
2026-01-20 12:12   ` Krzysztof Kozlowski
2026-01-23  6:33   ` Andrew Jeffery
2026-02-11  7:06     ` Andrew Jeffery
2026-01-20 11:43 ` [PATCH v3 2/3] dt-bindings: pinctrl: aspeed: Add support for AST27xx Billy Tsai
2026-01-20 12:24   ` Krzysztof Kozlowski [this message]
2026-01-20 12:27   ` Rob Herring (Arm)
2026-01-20 11:43 ` [PATCH v3 3/3] pinctrl: aspeed: add G7(AST2700) SoC0 pinctrl support Billy Tsai
2026-01-20 12:27   ` Krzysztof Kozlowski
2026-01-29  6:43     ` Billy Tsai

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