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Tue, 20 Jan 2026 12:25:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1768911904; bh=bLSG0tEveb+gncpwTtyqmY3n1fbc+iPmbTX/cVlIgjo=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=IIaZnQxvVk2+qt+Mlgp8OUNj0PN/kPCJgeWJPwt/wC9Tf91T9cMch3wsZDSUISe7N aJ/tUVy0ek8oZwyYaByCenkvW9fM3sCa5r2tt01VVYggu1iOccwcbfKRFs72MNUzSJ fp1enaMxHoy85UP291aH82jbFVSe44hpTRVqw7IFcGS1TCbsirqOj7caxvu6Tm3NYD K/muEe2rx2YnLbj44mIBGCFQkwNaqQhORFBWBzahjUSEEzM9bwz9g4x6sTioTHdbje dShHh+MtAglD4nEzVRLKqN3m7Rd5l73oFdXw7h+mmp3Xf6eJqpxCJgjKh8UclFPLXp E+E8Da302a5LQ== Message-ID: Date: Tue, 20 Jan 2026 13:24:58 +0100 X-Mailing-List: linux-aspeed@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/3] dt-bindings: pinctrl: aspeed: Add support for AST27xx To: Billy Tsai , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Linus Walleij , Bartosz Golaszewski Cc: Andrew Jeffery , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-gpio@vger.kernel.org, bmc-sw@aspeedtech.com References: <20260120-upstream_pinctrl-v3-0-868fbf8413b5@aspeedtech.com> <20260120-upstream_pinctrl-v3-2-868fbf8413b5@aspeedtech.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 20/01/2026 12:43, Billy Tsai wrote: > Add bindings for the pin controller found in ASPEED AST27xx SoCs. > > The AST2700 SoC consists of two interconnected SoC instances, each > with its own pin controller register block managed by a separate > System Control Unit (SCU). > > Introduce the "aspeed,ast2700-soc0-pinctrl" compatible string to > describe the SoC0 pin controller, which is not compatible with > existing ASPEED pinctrl bindings. > > The SoC1 pin controller follows a regular and predictable register > layout and can be described using an existing generic pinctrl > binding, therefore no dedicated AST2700-specific compatible string > is introduced for it. > > Signed-off-by: Billy Tsai > --- > .../bindings/mfd/aspeed,ast2x00-scu.yaml | 27 +++++ > .../pinctrl/aspeed,ast2700-soc0-pinctrl.yaml | 130 +++++++++++++++++++++ > 2 files changed, 157 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml > index ff6cf8f63cbc..7eda8fddc560 100644 > --- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml > +++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml > @@ -164,4 +164,31 @@ examples: > reg = <0x7c 0x4>, <0x150 0x8>; > }; > }; > + > + - | > + syscon@12c02000 { > + compatible = "aspeed,ast2700-scu0", "syscon", "simple-mfd"; No changes in the binding, so please do not add unnecessary examples. Plus this makes little sense now in way you split patches :/. Either you keep separate MFD from pinctrl for merging or, if not separate, you squash patches. Best regards, Krzysztof