Re: [PATCH v2 07/10] nvme-pci: Use PCI p2pmem subsystem to manage the CMB

Logan Gunthorpe
2018-03-05T18:09:52Z

On 05/03/18 11:02 AM, Sinan Kaya wrote:
> writel has a barrier inside on ARM64.
>
> https://elixir.bootlin.com/linux/latest/source/arch/arm64/include/asm/io.h#L143

Yes, and no barrier inside memcpy_toio as it uses __raw_writes. This
should be sufficient as we are only accessing addresses that look like
memory and have no side effects (those enabling doorbell accesses may
need to worry about this though). Typically, what could happen, in this
case, is the CPU would issue writes to the BAR normally and the next
time it programmed the DMA engine it would flush everything via the
flush in writel.

> Why do you need another barrier?

We don't.

Thanks,

Logan